ISL6336CRZ-T Datasheet, PDF (20/31 Pages) Intersil Corporation – 6-Phase PWM Controller with Light Load Efficiency Enhancement and Current Monitoring

ISL6336, ISL6336A
soft-start ramp until the voltage reaches the VID voltage
minus the offset voltage.
V_OUT, 500mV/DIV
t_D1
t_D2 t_D3 t_D4 t_D5
EN_VTT
VR_RDY
500µs/DIV
FIGURE 9. SOFT-START WAVEFORMS
The soft-start time is the sum of the 4 periods as shown in
Equation 14:
t_SS = t_D1 + t_D2 + t_D3 + t_D4
(EQ. 14)
t_D1 is a fixed delay with a typical value as 1.36ms. t_D3 is
determined by a fixed 85µs plus the time to obtain valid VID
voltage. If the VID is valid before the output reaches the
1.1V, the minimum time to validate the VID input is 500ns.
Therefore the minimum t_D3 is about 86µs.
During t_D2 and t_D4, ISL6336, ISL6336A digitally controls the
DAC voltage change at 6.25mV per step. The time for each
step is determined by the frequency of the soft-start oscillator,
which is defined by a resistor R_SS from SS pin to GND or
VCC. The equations are the same for the case where R_SS is
connected to GND or VCC. The two soft-start ramp times t_D2
and t_D4 can be calculated based on the Equations 15 and 16:
t_D2 = -16---.-.-12----5^â‹---R--_â‹---2^S---5-^S--(μs)
(EQ. 15)
t_D4
=
(_---(_{--V-----V----I-D------}–_{----1----.-1----})_---⋅_{---R-----S----S----})
6.25 ⋅ 25
(
μ
s
)
(EQ. 16)
For example, when VID is set to 1.5V and the R_SS is set at
100kΩ, the first soft-start ramp time t_D2 will be 704µs and the
second soft-start ramp time t_D4 will be 256µs.
After the DAC voltage reaches the final VID setting,
VR_RDY will be set to high with the fixed delay t_D5. The
typical value for t_D5 is 85µs. Before VR_RDY is released,
the controller disregards the PSI# input and always operates
in normal CCM PWM mode.
Current Sense Output
The current sourced at the IMON pin is equal to the sensed
average current inside the ISL6336, ISL6336A, I_AVG. In a
typical application, a resistor is placed from the IMON pin to
GND to generate a voltage which is proportional to the load
current as shown in Equation 17
V_IMON
=
-R----^I--^M-----^O----^N--
N
⋅
-----^R-----^X-------
R_ISEN
⋅
I_O
U
T
(EQ. 17)
where V_IMON is the voltage at the IMON pin, R_IMON is the
resistor between IMON and GND, I_OUT is the total output
current of the converter, R_ISEN is the sense resistor
connected to the ISEN+ pin, N is the active channel number
and R_X is the DC resistance of the current sense element.
The resistor from the IMON pin to GND should be chosen to
ensure that the voltage at the IMON pin is less than 1.12V
under the maximum load current. The IMON pin voltage is
clamped at a maximum of 1.12V. Once the 1.12V threshold
is reached, an overcurrent shutdown will be initiated as
described in “Overcurrent Protection” on page 21.
A small capacitor can be placed between the IMON pin and
GND to reduce noise. In addition, some applications will
require the V_IMON signal to be filtered with a minimum time
constant. The filter capacitor can be chosen appropriately
based on the R_IMON value to set the desired time constant.
V_{IMON_OFS}
0V
0A ^{LOAD INCREASING}
FIGURE 10. IMON VOLTAGE vs OUTPUT CURRENT
The voltage at the IMON pin will vary linearly with output
current, as shown in Figure 10 with some tolerance. Some
applications may require the addition of a positive offset on
IMON to offset for the tolerance at the maximum IMON
voltage value. This can be done by connecting a resistor
from the IMON pin to VCC as shown in Figure 11. The
required value for R_VCC can be determined by using
Equation 18:
R_VCC
=
R_{-----I--M-----O----N------}⋅_---(_--V_----C_-----C_{------–-----}V_{----I--M----O-----N----O-----F---S-----–-----}V_{----I--M-----O----N----M-----A----X----})
V_IMONOFS
(EQ. 18)
where R_IMON is the resistor from IMON to GND, V_IMONOFS
is the desired offset voltage at V_IMONMAX, and V_IMONMAX
is the voltage at IMON at the maximum load current.
For example, if the maximum IMON voltage is 900mV at full
load and the required offset voltage is 50mV and R_IMON is
10kΩ then R_VCC should be 810kΩ. R_IMON should be
connected to GND near the load to increase accuracy.
20
FN6504.1
May 28, 2009