ISL6236 Datasheet, PDF (20/35 Pages) Intersil Corporation – High-Efficiency, Quad-Output, Main Power Supply Controllers for Notebook Computers

ISL6236
logic. In addition, SMPS2 can also use REFIN2 to track its
output from 0.5V to 2.50V. The ISL6236 contains
fault-protection circuits that monitor the main PWM outputs for
undervoltage and overvoltage conditions. A power-on
sequence block controls the power-up timing of the main
PWMs and monitors the outputs for undervoltage faults. The
ISL6236 includes an adjustable low drop-out linear regulator.
The bias generator blocks include the linear regulator, 3.3V
precision reference, 2V precision reference and automatic
bootstrap switchover circuit.
The synchronous-switch gate drivers are directly powered
from PVCC, while the high-side switch gate drivers are
indirectly powered from PVCC through an external capacitor
and an internal Schottky diode boost circuit.
An automatic bootstrap circuit turns off the LDO linear
regulator and powers the device from BYP if LDOREFIN is
set to GND or VCC. See Table 1.
TABLE 1. LDO OUTPUT VOLTAGE TABLE
LDO VOLTAGE
CONDITIONS
COMMENT
VOLTAGE at BYP LDOREFIN < 0.3V,
BYP > 4.63V
Internal LDO is
disabled.
VOLTAGE at BYP LDOREFIN > VCC - 1V,
BYP > 3V
Internal LDO is
disabled.
5V
LDOREFIN < 0.3V,
Internal LDO is
BYP < 4.63V
active.
3.3V
LDOREFIN > VCC - 1V,
BYP < 3V
Internal LDO is
active.
2 x LDOREFIN
0.35V < LDOREFIN < 2.25V Internal LDO is
active.
FREE-RUNNING, CONSTANT ON-TIME PWM
CONTROLLER WITH INPUT FEED-FORWARD
The constant on-time PWM control architecture is a
pseudo-fixed-frequency, constant ON-time, current-mode
type with voltage feed-forward. The constant ON-time PWM
control architecture relies on the output ripple voltage to
provide the PWM ramp signal; thus the output filter
capacitor's ESR acts as a current-feedback resistor. The
high-side switch ON-time is determined by a one-shot whose
period is inversely proportional to input voltage and directly
proportional to output voltage. Another one-shot sets a
minimum OFF-time (300ns typ). The ON-time one-shot
triggers when the following conditions are met: the
error comparator's output is high, the synchronous rectifier
current is below the current-limit threshold, and the minimum
off time one-shot has timed out. The controller utilize the
valley point of the output ripple to regulate and determine the
OFF-time.
ON-TIME ONE-SHOT (t_ON)
Each PWM core includes a one-shot that sets the high-side
switch ON-time for each controller. Each fast, low-jitter,
adjustable one-shot includes circuitry that varies the
ON-time in response to battery and output voltage. The
high-side switch ON-time is inversely proportional to the
battery voltage as measured by the VIN input and
proportional to the output voltage. This algorithm results in a
nearly constant switching frequency despite the lack of a
fixed-frequency clock generator. The benefit of a constant
switching frequency is that the frequency can be selected to
avoid noise-sensitive frequency regions:
t_ON
=
K_-----(_--V_{-----O----U----T-----+-----}I_{--L---O-----A----D-----}⋅_---r_{--D----S----(--O-----N----)--(--L---O-----W-----E----R----Q-----)--})
V_IN
(EQ. 1)
See Table 2 for approximate K- factors. Switching frequency
increases as a function of load current due to the increasing
drop across the synchronous rectifier, which causes a faster
inductor-current discharge ramp. ON-times translate only
roughly to switching frequencies. The ON-times established
in the “Electrical Specifications” table starting on page 3 are
influenced by switching delays in the external high-side
power MOSFET. Also, the dead-time effect increases the
effective ON-time, reducing the switching frequency. It
occurs only in PWM mode (SKIP = VCC) and during
dynamic output voltage transitions when the inductor current
reverses at light or negative load currents. With reversed
inductor current, the inductor's EMF causes PHASE to go
high earlier than normal, extending the ON-time by a period
equal to the UGATE-rising dead time.
TABLE 2. APPROXIMATE K-FACTOR ERRORS
SMPS
SWITCHING
APPROXIMATE
FREQUENCY K-FACTOR K-FACTOR
(kHz)
(µs)
ERROR (%)
(t_ON = GND, REF,
400
2.5
±10
or OPEN), V_OUT1
(t_ON = GND),
V_OUT2
500
2.0
±10
(t_ON = VCC),
V_OUT1
200
5.0
±10
(t_ON = VCC, REF,
300
3.3
±10
or OPEN), V_OUT2
For loads above the critical conduction point, the actual
switching frequency is:
f
=
-----^V----^O-----^U----^T-----+-----^V----^D----^R----^O-----^P----¹------
t_ON(V_IN + V_DROP2)
(EQ. 2)
where:
• V_DROP1 is the sum of the parasitic voltage drops in the
inductor discharge path, including synchronous rectifier,
inductor, and PC board resistances
• V_DROP2 is the sum of the parasitic voltage drops in the
charging path, including high-side switch, inductor, and PC
board resistances
• t_ON is the ON-time calculated by the ISL6236
20
FN6373.6
April 29, 2010