X9522_06 Datasheet, PDF (2/27 Pages) Intersil Corporation – Triple DCP, Dual Voltage Monitors

X9522
Ordering Information
PART NUMBER
PART MARKING
PRESET (FACTORY SHIPPED) V_TRIPx
THRESHOLD LEVELS (x = 2, 3)
TEMP RANGE (°C)
PACKAGE
X9522V20I-A
X9522VIA
Optimized for 3.3V system monitoring
-40 to +85
20 Ld TSSOP
X9522V20I-B
X9522VIB
Optimized for 5V system monitoring
-40 to +85
20 Ld TSSOP
X9522V20IZ-A (Note) X9522VZIA
Optimized for 3.3V system monitoring
-40 to +85
20 Ld TSSOP (Pb-free)
X9522V20IZ-B (Note) X9522VZIB
Optimized for 5V system monitoring
-40 to +85
20 Ld TSSOP (Pb-free)
*Add "T1" suffix for tape and reel.
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
PIN CONFIGURATION
R_H2
R_W2
R_L2
V3
V3RO
NC
WP
SCL
SDA
V_SS
20 Pin TSSOP
1
20
2
19
3
18
4
17
5
16
6
15
7
14
8
13
9
12
10
11
Vcc / V1
NC
V2RO
V2
R_L0
R_W0
R_H0
R_H1
R_W1
R_L1
NOT TO SCALE
DETAILED DEVICE DESCRIPTION
The X9522 combines three Intersil Digitally Controlled
Potentiometer (DCP) devices, and two voltage monitors,
in one package. These functions are suited to the control,
support, and monitoring of various system parameters in
fiber optic modules. The combination of the X9522 func-
tionality lowers system cost, increases reliability, and
reduces board space requirements.
Two high resolution DCPs allow for the “set-and-forget”
adjustment of Laser Driver IC parameters such as Laser
Diode Bias and Modulation Currents. One lower resolu-
tion DCP may be used for setting sundry system param-
eters such as maximum laser output power (for eye
safety requirements).
The dual Voltage Monitor circuits continuously compare
their inputs to individual trip voltages. If an input voltage
exceeds it’s associated trip level, a hardware output
(V3RO, V2RO) are allowed to go HIGH. If the input volt-
age becomes lower than it’s associated trip level, the cor-
responding output is driven LOW. A corresponding
binary representation of the two monitor circuit outputs
(V2RO and V3RO) are also stored in latched, volatile
(CONSTAT) register bits. The status of these two moni-
tor outputs can be read out via the 2-wire serial port.
Intersil’s unique circuits allow for all internal trip volt-
ages to be individually programmed with high accu-
racy. This gives the designer great flexibility in
changing system parameters, either at the time of
manufacture, or in the field.
The device features a 2-Wire interface and software pro-
tocol allowing operation on an I²C™ compatible serial
bus.
2
FN8208.1
January 3, 2006