X9522_06 Datasheet, PDF (12/27 Pages) Intersil Corporation – Triple DCP, Dual Voltage Monitors

X9522
It should be noted that a write to nonvolatile bit (DWLK)
of CONSTAT register will be ignored if the Write Protect
pin of the X9522 is active (HIGH) (See "WP: Write Pro-
Vx
tection Pin").
V_TRIPx
0V
CONSTAT Register Read Operation
The contents of the CONSTAT Register can be read at
any time by performing a random read (See Figure 13).
Using the Slave Address Byte set to 10100101, and an
Address Byte of FFh. Only one byte is read by each reg-
ister read operation. The X9522 resets itself after the first
byte is read. The master should supply a STOP condition
to be consistent with the bus protocol.
After setting the WEL and / or the RWEL bit(s) to a “1”,
a CONSTAT register read operation may occur, without
interrupting a proceeding CONSTAT register write
operation.
When reading the contents of the CONSTAT register,
the bits CS7, CS4 and CS0 will always return “0”.
DATA PROTECTION
There are a number of levels of data protection features
designed into the X9522. Any write to the device first
requires setting of the WEL bit in the CONSTAT register.
A write to the CONSTAT register itself, further requires
the setting of the RWEL bit. The DCP Write Lock of the
device enables the user to inhibit writes to all DCPs. One
further level of data protection in the X9522, is incorpo-
rated in the form of the Write Protection pin.
WP: Write Protection Pin
When the Write Protection (WP) pin is active (HIGH), it
disables nonvolatile write operations to the X9522.
The table below (X9522 Write Permission Status) sum-
marizes the effect of the WP pin (and DCP Write Lock),
on the write permission status of the device.
VxRO
0V
Vcc / V1
0 Volts
V_TRIP
(x = 2,3)
Figure 14. Voltage Monitor Response
Additional Data Protection Features
In addition to the preceding features, the X9522 also
incorporates the following data protection functionality:
—The proper clock count and data bit sequence is
required prior to the STOP bit in order to start a nonvol-
atile write cycle.
VOLTAGE MONITORING FUNCTIONS
V2 monitoring
The X9522 asserts the V2RO output HIGH if the volt-
age V2 exceeds the corresponding V_TRIP2 threshold
(See Figure 14). The bit V2OS in the CONSTAT regis-
ter is then set to a “0” (assuming that it has been set to
“1” after system initilization).
The V2RO output may remain active HIGH with Vcc
down to 1V.
X9522 Write Permission Status
DWLK
(DCP Write Lock
bit status)
1
0
1
0
WP
(Write Protect pin
status)
1
1
0
0
DCP Volatile Write
Permitted
NO
YES
NO
YES
DCP Nonvolatile
Write Permitted
NO
NO
NO
YES
Write to CONSTAT Register
Permitted
Volatile Bits Nonvolatile Bits
NO
NO
NO
NO
YES
YES
YES
YES
12
FN8208.1
January 3, 2006