X9221A Datasheet, PDF (2/15 Pages) Intersil Corporation – 64 Taps, 2-Wire Serial Bus

X9221A
Ordering Information
PART NUMBER
X9221AYP
X9221AYPZ (Note)
X9221AYPI
X9221AYPIZ (Note)
X9221AYS*
X9221AYSZ* (Note)
X9221AYSI*
X9221AYSIZ* (Note)
X9221AWP
PART MARKING
X9221AYP
X9221AYP Z
X9221AYPI
X9221AYPI Z
X9221AYS
X9221AYS Z
X9221AYSI
X9221AYSI Z
X9221AWP
V_CC LIMITS (V)
5 ±10%
R_TOTAL (K)
2
10
TEMP RANGE (°C)
PACKAGE
0 to 70
20 Ld PDIP
0 to 70
20 Ld PDIP (Pb-free)
-40 to 85
20 Ld PDIP
-40 to 85
20 Ld PDIP (Pb-Free)
0 to 70
20 Ld SOIC (300MIL)
0 to 70
20 Ld SOIC (300MIL) (Pb-Free)
-40 to 85
20 Ld SOIC (300MIL)
-40 to 85
20 Ld SOIC (300MIL) (Pb-Free)
0 to 70
20 Ld PDIP
X9221AWPZ (Note)
X9221AWPI
X9221AWPIZ (Note)
X9221AWS*
X9221AWSZ* (Note)
X9221AWSI*
X9221AWSIZ* (Note)
X9221AUP
X9221AUPZ (Note)
X9221AUPI
X9221AUPIZ (Note)
X9221AWP Z
X9221AWPI
X9221AWPI Z
X9221AWS
X9221AWS Z
X9221AWSI
X9221AWSI Z
X9221AUP
X9221AUP Z
X9221AUPI
X9221AUPI Z
0 to 70
20 Ld PDIP (Pb-Free)
-40 to 85
20 Ld PDIP
-40 to 85
20 Ld PDIP (Pb-Free)
0 to 70
20 Ld SOIC (300MIL)
0 to 70
20 Ld SOIC (300MIL) (Pb-Free)
-40 to 85
20 Ld SOIC (300MIL)
-40 to 85
20 Ld SOIC (300MIL) (Pb-Free)
50
0 to 70
20 Ld PDIP
0 to 70
20 Ld PDIP (Pb-Free)
-40 to 85
20 Ld PDIP
-40 to 85
20 Ld PDIP (Pb-Free)
X9221AUS*
X9221AUS
0 to 70
20 Ld SOIC (300MIL)
X9221AUSZ* (Note)
X9221AUS Z
0 to 70
20 Ld SOIC (300MIL) (Pb-Free)
X9221AUSI*
X9221AUSI
-40 to 85
20 Ld SOIC (300MIL)
X9221AUSIZ* (Note)
X9221AUSI Z
-40 to 85
20 Ld SOIC (300MIL) (Pb-Free)
*Add "T1" suffix for tape and reel.
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
2
FN8163.1
September 14, 2005