ISL12022MR5421 Datasheet, PDF (2/29 Pages) Intersil Corporation – Low Power RTC with Battery Backed SRAM, Integrated 5ppm

Block Diagram
ISL12022MR5421
SDA
SCL
SDA
BUFFER
SCL
BUFFER
I²C
INTERFACE
CONTROL
LOGIC
REGISTERS
CRYSTAL
OSCILLATOR
RTC
DIVIDER
V_DD
V_TRIP
+-
V_BAT
GND
POR
FREQUENCY
OUT
ALARM
SWITCH
INTERNAL
SUPPLY
TEMPERATURE
SENSOR
FREQUENCY
CONTROL
SECONDS
MINUTES
HOURS
DAY OF WEEK
DATE
MONTH
YEAR
CONTROL
REGISTERS
USER
SRAM
IRQ/F_OUT
Pin Configuration
ISL12022MR5421
(20 LD SOIC)
TOP VIEW
GND
1
GND
2
GND
3
NC
4
NC
5
GND
6
V_BAT
7
GND
8
NC
9
NC
10
20
GND
19
GND
18
GND
17
NC
16
NC
15
GND
14
V_DD
13
IRQ/F_OUT
12
SCL
11
SDA
Pin Descriptions
PIN
NUMBER
4, 5, 9, 10,
16, 17
7
11
12
SYMBOL
DESCRIPTION
NC
No Connection. Do not connect to a signal or supply voltage.
V_BAT
SDA
SCL
Backup Supply. This input provides a backup supply voltage to the device. V_BAT supplies power to
the device in the event that the V_DD supply fails. This pin can be connected to a battery, a
supercapacitor or tied to ground if not used. See the Battery Monitor parameter in the “DC Operating
Characteristics-RTC” table on page 5. This pin should be tied to ground if not used.
Serial Data. SDA is a bi-directional pin used to transfer data into and out of the device. It has an
open drain output and may be OR’ed with other open drain or open collector outputs. The input buffer
is always active (not gated) in normal mode.
An open drain output requires the use of a pull-up resistor. The output circuitry controls the fall time
of the output signal with the use of a slope controlled pull-down. The circuit is designed for 400kHz
I²C interface speeds. It is disabled when the backup power supply on the V_BAT pin is activated.
Serial Clock. The SCL input is used to clock all serial data into and out of the device. The input buffer
on this pin is always active (not gated). It is disabled when the backup power supply on the V_BAT pin
is activated to minimize power consumption.
2
FN7576.1
June 4, 2010