English
Language : 

ISL12022MR5421 Datasheet, PDF (11/29 Pages) Intersil Corporation – Low Power RTC with Battery Backed SRAM, Integrated 5ppm
ISL12022MR5421
Functional Description
Power Control Operation
The power control circuit accepts a VDD and a VBAT
input. Many types of batteries can be used with Intersil
RTC products. For example, 3.0V or 3.6V Lithium
batteries are appropriate, and battery sizes are available
that can power the ISL12022MR5421 for up to 10 years.
Another option is to use a supercapacitor for applications
where VDD is interrupted for up to a month. See the
“Application Section” on page 26 for more information.
Normal Mode (VDD) to Battery Backup Mode
(VBAT)
To transition from the VDD to VBAT mode, both of the
following conditions must be met:
Condition 1:
VDD < VBAT - VBATHYS
where VBATHYS ≈ 50mV
Condition 2:
VDD < VTRIP
where VTRIP ≈ 2.2V
Battery Backup Mode (VBAT) to Normal
Mode (VDD)
The ISL12022MR5421 device will switch from the VBAT to
VDD mode when one of the following conditions occurs:
Condition 1:
VDD > VBAT + VBATHYS
where VBATHYS ≈ 50mV
Condition 2:
VDD > VTRIP + VTRIPHYS
where VTRIPHYS ≈ 30mV
These power control situations are illustrated in
Figures 12 and 13.
The I2C bus is deactivated in battery backup mode to
reduce power consumption. Aside from this, all RTC
functions are operational during battery backup mode.
Except for SCL and SDA, all the inputs and outputs of
the ISL12022MR5421 are active during battery backup
mode unless disabled via the control register.
VDD
BATTERY BACKUP
MODE
VTRIP
VBAT
2.2V
1.8V
VBAT - VBATHYS
VBAT + VBATHYS
FIGURE 12. BATTERY SWITCHOVER WHEN VBAT <
VTRIP
VDD
VBAT
VTRIP
BATTERY BACKUP
MODE
3.0V
2.2V
VTRIP
VTRIP + VTRIPHYS
FIGURE 13. BATTERY SWITCHOVER WHEN VBAT >
VTRIP
The device Time Stamps the switchover from VDD to
VBAT and VBAT to VDD, and the time is stored in tSV2B
and tSB2V registers respectively. If multiple VDD
power-down sequences occur before the status is read,
the earliest VDD to VBAT power-down time is stored and
the most recent VBAT to VDD time is stored.
Temperature conversion and compensation can be
enabled in battery backup mode. Bit BTSE in the BETA
register controls this operation, as described in “BETA
Register (BETA)” on page 19.
Power Failure Detection
The ISL12022MR5421 provides a Real Time Clock Failure
Bit (RTCF) to detect total power failure. It allows users to
determine if the device has powered up after having lost
all power to the device (both VDD and VBAT).
Brownout Detection
The ISL12022MR5421 monitors the VDD level
continuously and provides warning if the VDD level drops
below prescribed levels. There are six (6) levels that can
be selected for the trip level. These values are 85%
below popular VDD levels. The LVDD bit in the Status
Register will be set to “1” when brownout is detected.
Note that the I2C serial bus remains active unless the
Battery VTRIP levels are reached.
Battery Level Monitor
The ISL12022MR5421 has a built-in warning feature
once the backup battery level drops first to 85% and
then to 75% of the battery’s nominal VBAT level. When
the battery voltage drops to between 85% and 75%, the
LBAT85 bit is set in the status register. When the level
drops below 75%, both LBAT85 and LBAT75 bits are set
in the status register.
The battery level monitor is not functional in battery
backup mode. In order to read the monitor bits after
powering up VDD, instigate a battery level measurement
by setting the TSE bit to "1" (BETA register), and then
read the bits.
There is a Battery Time Stamp Function available. Once
the VDD is low enough to enable switchover to the
battery, the RTC time/date are written into the TSV2B
register. This information can be read from the TSV2B
registers to discover the point in time of the VDD
power-down. If there are multiple power-down cycles
before reading these registers, the first values stored in
11
FN7576.1
June 4, 2010