ISL12020M Datasheet, PDF (19/32 Pages) Intersil Corporation – Low Power RTC with Battery Backed SRAM, Integrated ±5ppm Temperature Compensation and Auto Daylight Saving

ISL12020M
IATR05
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
TABLE 12. IATRO TRIMMING RANGE (Continued)
IATR04
IATR03
IATR02
IATR01
IATR00
0
1
0
0
0
0
1
0
0
1
0
1
0
1
0
0
1
0
1
1
0
1
1
0
0
0
1
1
0
1
0
1
1
1
0
0
1
1
1
1
1
0
0
0
0
1
0
0
0
1
1
0
0
1
0
1
0
0
1
1
1
0
1
0
0
1
0
1
0
1
1
0
1
1
0
1
0
1
1
1
1
1
0
0
0
1
1
0
0
1
1
1
0
1
0
1
1
0
1
1
1
1
1
0
0
1
1
1
0
1
1
1
1
1
0
1
1
1
1
1
TRIMMING RANGE
-8
-9
-10
-11
-12
-13
-14
-15
-16
-17
-18
-19
-20
-21
-22
-23
-24
-25
-26
-27
-28
-29
-30
-31
ALPHA Register (ALPHA)
TABLE 13. ALPHA REGISTER
ADDR 7
6
5
4
3
2
1
0
0Ch D ALPHA6 ALPHA5 ALPHA4 ALPHA3 ALPHA2 ALPHA1 ALPHA0
The ALPHA variable is 8 bits and is defined as the
temperature coefficient of crystal from -40°C to T0, or
the ALPHA Cold (there is an Alpha Hot register that must
be programmed as well). It is normally given in units of
ppm/°C², with a typical value of -0.034. The ISL12020M
device uses a scaled version of the absolute value of this
coefficient in order to get an integer value. Therefore,
ALPHA<7:0> is defined as the (|Actual ALPHA Value| x
2048) and converted to binary. For example, a crystal
with Alpha of -0.034ppm/°C² is first scaled
(|2048*(-0.034)| = 70d) and then converted to a
binary number of 01000110b.
The practical range of Actual ALPHA values is from
-0.020 to -0.060.
The ISL12020M has a preset ALPHA value corresponding
to the crystal in the module. This value is recalled on
initial power-up and should remain unchanged for
best compensation performance, although the user
can override this preset value if so desired.
The ALPHA register should only be changed while the
TSE (Temp Sense Enable) bit is “0”. Note that both the
ALPHA and the ALPHA Hot registers need to be
programmed with values for full range temperature
compensation.
BETA Register (BETA)
TABLE 14.
ADDR 7 6 5
4
3
2
1
0
0Dh TSE BTSE BTSR BETA4 BETA3 BETA2 BETA1 BETA0
TEMPERATURE SENSOR ENABLED BIT (TSE)
This bit enables the Temperature Sensing operation,
including the temperature sensor, A/D converter and
FATR/FDTR register adjustment. The default mode after
power-up is disabled (TSE = 0). To enable the operation,
TSE should be set to 1 (TSE = 1). When temp sense is
disabled, the initial values for IATR and IDTR registers
are used for frequency control.
All changes to the IDTR, IATR, ALPHA and BETA
registers must be made with TSE = 0. After loading the
new values, TSE can be enabled and the new values are
used. When TSE is set to 1, the temperature conversion
cycle begins and will end when two temperature
conversions are completed. The average of the two
conversions is in the TEMP registers.
TEMP SENSOR CONVERSION IN BATTERY MODE
BIT (BTSE)
This bit enables the Temperature Sensing and Correction
in battery mode. BTSE = 0 (default) no conversion, Temp
Sensing or Compensation in battery mode. BTSE = 1
indicates Temp Sensing and Compensation enabled in
battery mode. The BTSE is disabled when the battery
voltage is lower than 2.7V. No temperature
compensation will take place with V_BAT<2.7V.
19
FN6667.4
February 11, 2010