ISL6327 Datasheet, PDF (17/30 Pages) Intersil Corporation – Enhanced 6-Phase PWM Controller with 8-Bit VID Code and Differential Inductor DCR or Resistor Current Sensing

ISL6327
TABLE 3. VR11 VID 8 BIT (Continued)
VID7 VID6 VID5 VID4 VID3 VID2 VID1 VID0 VOLTAGE
1
0
0
0
1
0
1
0 0.75000
1
0
0
0
1
0
1
1 0.74375
1
0
0
0
1
1
0
0 0.73750
1
0
0
0
1
1
0
1 0.73125
1
0
0
0
1
1
1
0 0.72500
1
0
0
0
1
1
1
1 0.71875
1
0
0
1
0
0
0
0 0.71250
1
0
0
1
0
0
0
1 0.70625
1
0
0
1
0
0
1
0 0.70000
1
0
0
1
0
0
1
1 0.69375
1
0
0
1
0
1
0
0 0.68750
1
0
0
1
0
1
0
1 0.68125
1
0
0
1
0
1
1
0 0.67500
1
0
0
1
0
1
1
1 0.66875
1
0
0
1
1
0
0
0 0.66250
1
0
0
1
1
0
0
1 0.65625
1
0
0
1
1
0
1
0 0.65000
1
0
0
1
1
0
1
1 0.64375
1
0
0
1
1
1
0
0 0.63750
1
0
0
1
1
1
0
1 0.63125
1
0
0
1
1
1
1
0 0.62500
1
0
0
1
1
1
1
1 0.61875
1
0
1
0
0
0
0
0 0.61250
1
0
1
0
0
0
0
1 0.60625
1
0
1
0
0
0
1
0 0.60000
1
0
1
0
0
0
1
1 0.59375
1
0
1
0
0
1
0
0 0.58750
1
0
1
0
0
1
0
1 0.58125
1
0
1
0
0
1
1
0 0.57500
1
0
1
0
0
1
1
1 0.56875
1
0
1
0
1
0
0
0 0.56250
1
0
1
0
1
0
0
1 0.55625
1
0
1
0
1
0
1
0 0.55000
1
0
1
0
1
0
1
1 0.54375
1
0
1
0
1
1
0
0 0.53750
1
0
1
0
1
1
0
1 0.53125
1
0
1
0
1
1
1
0 0.52500
1
0
1
0
1
1
1
1 0.51875
1
0
1
1
0
0
0
0 0.51250
1
0
1
1
0
0
0
1 0.50625
1
0
1
1
0
0
1
0 0.50000
TABLE 3. VR11 VID 8 BIT (Continued)
VID7 VID6 VID5 VID4 VID3 VID2 VID1 VID0 VOLTAGE
1
1
1
1
1
1
1
0 OFF
1
1
1
1
1
1
1
1 OFF
As shown in Figure 5, a current proportional to the average
current of all active channels, I_AVG, flows from FB through a
load-line regulation resistor R_FB. The resulting voltage drop
across R_FB is proportional to the output current, effectively
creating an output voltage droop with a steady-state value
defined as:
V_DROOP = I_AVG R_FB
(EQ. 8)
The regulated output voltage is reduced by the droop voltage
V_DROOP. The output voltage as a function of load current is
derived by combining Equation 8 with the appropriate
sample current expression defined by the current sense
method employed.
V_OUT
=
V_REF
–
V_O
F
S
–
⎛
⎜
⎝
-I-^O-----^U----^T--
N
------R----^X-------
R_ISEN
⎞
R _{F B⎠⎟}
(EQ. 9)
Where V_REF is the reference voltage, V_OFS is the
programmed offset voltage, I_OUT is the total output current
of the converter, R_ISEN is the sense resistor connected to
the ISEN+ pin, and R_FB is the feedback resistor, N is the
active channel number, and R_X is the DCR, or R_SENSE
depending on the sensing method.
Therefore the equivalent loadline impedance, i.e. Droop
impedance, is equal to:
R_LL
=
--R----^F----^B--
N
-----R-----^X-------
R_ISEN
(EQ. 10)
Output-Voltage Offset Programming
The ISL6327 allows the designer to accurately adjust the
offset voltage. When a resistor, R_OFS, is connected between
OFS to VCC, the voltage across it is regulated to 1.6V. This
causes a proportional current (I_OFS) to flow into OFS. If
R_OFS is connected to ground, the voltage across it is
regulated to 0.4V, and I_OFS flows out of OFS. A resistor
between DAC and REF, R_REF, is selected so that the
product (I_OFS x R_OFS) is equal to the desired offset voltage.
These functions are shown in Figure 6.
Once the desired output offset voltage has been determined,
use the following formulae to set R_OFS:
For Positive Offset (connect R_OFS to VCC):
R_OFS
=
1_----._--6_----×_-----R_{-----R----E----F-}
V_OFFSET
(EQ. 11)
For Negative Offset (connect R_OFS to GND):
R_OFS
=
0_----._--4_----×_-----R_{-----R----E----F-}
V_OFFSET
(EQ. 12)
17
FN9276.2
December 20, 2006