ISL6142 Datasheet, PDF (17/23 Pages) Intersil Corporation – Negative Voltage Hot Plug Controller

ISL6142, ISL6152
externally referenced to either V_DD or V_EE of the IC, instead
of GND.
Inrush Current Control
The primary function of the ISL6142/52 hot plug controller is
to control the inrush current. When a board is plugged into a
live backplane, the input capacitors of the board’s power
supply circuit can produce large current transients as they
charge up. This can cause glitches on the system power
supply (which can affect other boards!), as well as possibly
cause some permanent damage to the power supply.
The key to allowing boards to be inserted into a live backplane
is to turn on the power to the board in a controlled manner,
usually by limiting the current allowed to flow through a FET
switch, until the input capacitors are fully charged. At that
point, the FET is fully on, for the smallest voltage drop across
it. Figure 31 illustrates the typical inrush current response for a
hot insertion under the following conditions:
V_IN = -48V, Rsense = 0.02W
Current limit = 50mV / 0.02Ω = 2.5A
C1 = 150nF, C2 = 3.3nF, R3 = 18kΩ
CL = 100µF, RL = 50Ω, I _LOAD = 48V / 50Ω ~1.0A
I_inrush = 50µA (100µF / 3.3nF) = 1.5A
After the contact bounce subsides the UVLO and UV criteria
are quickly met and the GATE begins to ramp up. As the
GATE reaches approximately 4V with respect to the source,
the FET begins to turn on allowing current to charge the
100µF load capacitor. As the drain to source voltage begins to
drop, the feedback network of C2 and R3 hold the GATE
constant, in this case limiting the current to approximately
1.5A. When the DRAIN voltage completes its ramp down, the
load current remains constant at approximately 1.0A as the
GATE voltage increases to its final value.
excessive supply or fault currents. The IntelliTrip^TM electronic
circuit breaker is capable of detecting both hard faults, and
less severe Over-Current conditions.
The Over-Current trip point is determined by R1 (EQ. 3) also
referred to as Rsense. When the voltage across this resistor
exceeds 50mV, the current limit regulator will turn on, and the
GATE will be pulled lower (to ~4V) to regulate current through
the FET at 50mV/Rsense. If the fault persists and current
limiting exceeds the programmed time-out period, the FET will
be turned off by discharging the GATE pin to V_EE. This will set
the Over-Current latch and the PWRGD/PWRGD output will
transition to the inactive state, indicating power is no longer
good. To clear the latch and initiate a normal start-up
sequence, the user must either power down the system
(below the UVLO voltage), toggle the UV pin below and above
its threshold (usually with an external transistor), or toggle the
DIS pin high to low. Figure 32 shows the Over-Current shut
down and current limiting response for a 10Ω short to ground
on the output. Prior to the short circuit the output load is 110Ω
producing an operating current of about 0.44A (48V/110Ω). A
10Ω short is then applied to the output causing an initial fault
current of 4.8A. This produces a voltage drop across the
0.02Ω sense resistor of approximately 95mV, roughly two
times the Over-Current threshold of 50mV. The GATE is
quickly pulled low to limit the current to 2.5A (50mV/Rsense)
and the timer is enabled. The fault condition persists for the
duration of the programmed time-out period (C3 = 1500pF)
and the GATE is latched off in about 740µs. There is a short
filter (3µs nominal) on the comparator, so current transients
shorter than this will be ignored. Longer transients will initiate
the GATE pull down, current limiting, and the timer. If the fault
current goes away before the time-out period expires the
device will exit the current limiting mode and resume normal
operation.
FIGURE 31. HOT INSERTION INRUSH CURRENT LIMITING,
DISABLE PIN TIED TO V_EE
Electronic Circuit Breaker/Current Limit
The ISL6142/52 allows the user to program both the current
limit and the time-out period to protect the system against
17
FIGURE 32. CURRENT LIMITING AND TIME-OUT
In addition to current limiting and programmable time-out,
there is a hard fault comparator to respond to short circuits
with an immediate GATE shutdown (typically 10µs) and a
single retry. The trip point of this comparator is set ~4 times