ISL12020 Datasheet, PDF (16/25 Pages) Intersil Corporation – Low Power RTC with VDD Battery Backed SRAM and Embedded Temp Compensation ±5ppm with Auto Day Light Saving

ISL12020
TABLE 12. IATRO TRIMMING RANGE (Continued)
TRIMMING
IATR05 IATR04 IATR03 IATR02 IATR01 IATR00 RANGE
0
0
1
1
0
0
+20
0
0
1
1
0
1
+19
0
0
1
1
1
0
+18
0
0
1
1
1
1
+17
0
1
0
0
0
0
+16
0
1
0
0
0
1
+15
0
1
0
0
1
0
+14
0
1
0
0
1
1
+13
0
1
0
1
0
0
+12
0
1
0
1
0
1
+11
0
1
0
1
1
0
+10
0
1
0
1
1
1
+9
0
1
1
0
0
0
+8
0
1
1
0
0
1
+7
0
1
1
0
1
0
+6
0
1
1
0
1
1
+5
0
1
1
1
0
0
+4
0
1
1
1
0
1
+3
0
1
1
1
1
0
+2
0
1
1
1
1
1
+1
1
0
0
0
0
0
0
1
0
0
0
0
1
-1
1
0
0
0
1
0
-2
1
0
0
0
1
1
-3
1
0
0
1
0
0
-4
1
0
0
1
0
1
-5
1
0
0
1
1
0
-6
1
0
0
1
1
1
-7
1
0
1
0
0
0
-8
1
0
1
0
0
1
-9
1
0
1
0
1
0
-10
1
0
1
0
1
1
-11
1
0
1
1
0
0
-12
1
0
1
1
0
1
-13
1
0
1
1
1
0
-14
1
0
1
1
1
1
-15
1
1
0
0
0
0
-16
1
1
0
0
0
1
-17
1
1
0
0
1
0
-18
1
1
0
0
1
1
-19
1
1
0
1
0
0
-20
1
1
0
1
0
1
-21
1
1
0
1
1
0
-22
1
1
0
1
1
1
-23
1
1
1
0
0
0
-24
1
1
1
0
0
1
-25
1
1
1
0
1
0
-26
1
1
1
0
1
1
-27
1
1
1
1
0
0
-28
1
1
1
1
0
1
-29
1
1
1
1
1
0
-30
1
1
1
1
1
1
-31
ALPHA Register (ALPHA)
TABLE 13. ALPHA REGISTER
ADDR 7
6
5
4
3
2
1
0
0Ch 0 ALPHA6 ALPHA5 ALPHA4 ALPHA3 ALPHA2 ALPHA1 ALPHA0
The Alpha variable is 7 bits and is defined as the
temperature coefficient of Crystal, normally given in units of
ppm/°C² = and with a typical value of -0.034. The ISL12020
devices use a scaled version of the absolute value of this
coefficient in order to get an integer value. Therefore, Alpha
<6:0> is defined as the (|Actual Alpha Value| x 1024) and
converted to binary. For example, a crystal with Alpha of -
0.034ppm/°C² is first scaled:
|1024*(-0.034)| = 35d and then converted to a binary number
of 0100011b.
The practical range of Actual Alpha values is from
-0.020 to -0.060.
The ALPHA register should only be changed while the TSE
(Temp Sense Enable) bit is “0”.
BETA Register (BETA)
TABLE 14.
ADDR 7
6
5
4
3
2
1
0
0Dh TSE BTSE BTSR 0 BETA3 BETA2 BETA1 BETA0
TEMPERATURE SENSOR ENABLED BIT (TSE)
This bit enables the Temperature Sensing operation, including
the temperature sensor, A/D converter and ATR/DTR register
adjustment. The default mode after power up is disabled
(TSE = 0). To enable the operation, TSE should be set to 1
(TSE = 1). When temp sense is disabled, the initial values for
IATR and IDTR registers are used for frequency control.
All changes to the IDTR, IATR, ALPHA and BETA registers
must be made with TSE = 0. After loading the new values,
then TSE can be enabled and the new values are used.
TEMP SENSOR CONVERSION IN BATTERY MODE BIT
(BTSE)
This bit enables the Temperature Sensing and Correction in
battery mode. BTSE = 0 defualt no conversion in battery
mode. BTSE = 1 Temp Sensing enabled in battery
mode.The BTSE is disabled when battery voltage is lower
than 2.6V.
FREQUENCY OF TEMPERATURE SENSING AND
CORRECTION BIT (BTSR)
This bit controls the frequency of Temp Sensing and
Correction. BTSR = 0 default mode is every 10 minutes,
BTSR = 1 is every 1.0 minute. Note that BTSE has to be
enabled in both cases. See Table 15.
16
FN6450.0
March 29, 2007