ISL6554 Datasheet, PDF (15/16 Pages) Intersil Corporation – Microprocessor CORE Voltage Regulator Using Multi-Phase Buck PWM Control Without Programmable Droop

ISL6554
t_SW which increases the upper MOSFET switching losses.
Ensure that both MOSFETs are within their maximum
junction temperature at high ambient temperature by
calculating the temperature rise according to package
thermal-resistance specifications. A separate heatsink may
be necessary depending upon MOSFET power, package
type, ambient temperature and air flow.
P_UPPER
=
I_--O-----²_----×_-----r_{--D----S----(--O-----N----)---}×_-----V_{----O-----U----T-- +} I_--O------×_-----V_{----I--N-----}×_-----t_{--S----W------}×_-----F_{----S----W---}
V_IN
2
P_LOWER
=
I_--O-----²_----×_-----r_{--D----S----(--O-----N----)---}×_-----(_---V_{----I--N-----}–_----V_{-----O----U----T----})
V_IN
A diode, anode to ground, may be placed across Q2 and Q4
of Figure 1. These diodes function as a clamp that catches
the negative inductor swing during the dead time between
the turn off of the lower MOSFETs and the turn on of the
upper MOSFETs. The diodes must be a Schottky type to
prevent the lossy parasitic MOSFET body diode from
conducting. It is usually acceptable to omit the diodes and let
the body diodes of the lower MOSFETs clamp the negative
inductor swing, but efficiency could drop one or two percent
as a result. The diode’s rated reverse breakdown voltage
must be greater than the maximum input voltage.
References
Intersil documents are available on the web at
www.intersil.com/
[1] HIP6601/HIP6603 Data Sheet, Intersil Corporation,
File No. 4819
[2] HIP6602 Data Sheet, Intersil Corporation, File No. 4838
15
FN9003.3
February 11, 2005