ISL6554 Datasheet, PDF (11/16 Pages) Intersil Corporation – Microprocessor CORE Voltage Regulator Using Multi-Phase Buck PWM Control Without Programmable Droop

ISL6554
R_FB R_IN C_c
FB
COMP
ERROR
AMPLIFIER
-
+
SAWTOOTH
GENERATOR
CORRECTION
+
ISL6554
COMPARATOR
-
PWM
+
CIRCUIT
REFERENCE
DAC
D^- IFFERENCE
+
CURRENT
SENSING
TO OVER
CURRENT
TRIP
-
TO OTHER
CHANNELS
COMPARATOR
+
-
REFERENCE
AVERAGING
CURRENT
SENSING
FROM
OTHER
CHANNELS
PWM
ISEN
V_IN
Q1 L01
HIP6601
Q2
I_L
PHASE
R_ISEN
ONLY ONE OUTPUT
STAGE SHOWN
INDUCTOR
CURRENT(S)
FROM
OTHER
CHANNELS
V_CORE
FIGURE 7. SIMPLIFIED FUNCTIONAL BLOCK DIAGRAM SHOWING CURRENT AND VOLTAGE SAMPLING
The nominal current through the R_ISEN resistor should be
50µA at full output load current, and the nominal trip point for
overcurrent detection is 165% of that value, or 82.5µA.
Therefore, R_ISEN = I_L x r_DS(ON) (Q2) / 50µA.
For a full load of 25A per phase, and an r_DS(ON) (Q2) of
4mΩ, R_ISEN = 2kΩ.
The overcurrent trip point would be 165% of 25A, or ~ 41A
per phase. The R_ISEN value can be adjusted to change the
overcurrent trip point, but it is suggested to stay within ±25%
of nominal.
Current Balancing
The detected currents are also used to balance the phase
currents.
Each phase’s current is compared to the average of all
phase currents, and the difference is used to create an offset
in that phase’s PWM comparator. The offset is in a direction
to reduce the imbalance.
The balancing circuit can not make up for a difference in
r_DS(ON) between synchronous rectifiers. If a FET has a higher
r_DS(ON), the current through that phase will be reduced.
Figures 8 and 9 show the inductor current of a two phase
system without and with current balancing.
Inductor Current
The inductor current in each phase of a multi-phase Buck
converter has two components. There is a current equal to
the load current divided by the number of phases (I_LT / n),
and a sawtooth current, (i_PK-PK) resulting from switching.
The sawtooth component is dependent on the size of the
inductors, the switching frequency of each phase, and the
values of the input and output voltage. Ignoring secondary
effects, such as series resistance, the peak to peak value of
the sawtooth current can be described by:
i_PK-PK = (V_IN x V_CORE - V_CORE2) / (L x F_SW x V_IN)
Where: V_CORE = DC value of the output or V_ID voltage
V_IN= DC value of the input or supply voltage
L= value of the inductor
F_SW= switching frequency
Example: For V_CORE= 1.6V,
V_IN= 12V,
L= 1.3µH,
F_SW= 250kHz,
Then i_PK-PK = 4.3A
The inductor, or load current, flows alternately from V_IN
through Q1 and from ground through Q2. The ISL6554
samples the on-state voltage drop across each Q2 transistor
to indicate the inductor current in that phase. The voltage
drop is sampled 1/3 of a switching period, i/F_SW, after Q1 is
turned OFF and Q2 is turned on. Because of the sawtooth
current component, the sampled current is different from the
average current per phase. Neglecting secondary effects,
the sampled current (I_SAMPLE) can be related to the load
current (I_LT) by:
I_SAMPLE = I_LT / n + (V_INV_CORE -3V_CORE2) / (6L x F_SW x V_IN)
Where:
I_LT = total load current
n = the number of channels
Example: Using the previously given conditions, and
For
I_LT = 100A,
n=4
Then I_SAMPLE = 25.49A
11
FN9003.3
February 11, 2005