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ISL59911_14 Datasheet, PDF (15/17 Pages) Intersil Corporation – 250MHz Triple Differential Receiver/ Equalizer with I2C Interface
ISL59911
Configuration Register Read
Figure 18 shows two views of the steps necessary to read one or
more words from the Configuration Register.
START Command
Signals the beginning of serial I/O
ISL59911 Serial Bus
R/W
ISL59911 Device Select Address Write
1
0
0
0
1 ADDR1 ADDR0 0
The first 7 bits of the first byte select the ISL59911 on the 2-wire
bus at the address set by the ADDR0 and ADDR1 pins.
R/W = 0, indicating that the next transaction will be a write.
ISL59911 Register Address Write
A7
A6
A5
A4
A3
A2
A1
A0 This sets the initial address of the ISL59911’s Configuration
Register for subsequent reading.
START Command
Ends the previous transaction and starts a new one.
ISL59911 Serial Bus
R/W ISL59911 Serial Bus Address Write
This is the same 7-bit address that was sent previously, however
1
0
0
0
1 ADDR1 ADDR0 1 the R/W bit is now a 1, indicating that the next transaction(s) will
be a read.
D7
D6
Signals from
the Host
SDA Bus
Signals from
the ISL59911
ISL59911 Register Data Read(s)
D5
D4
D3
D2
D1
D0 This is the data read from the ISL59911’s Configuration Register.
(Repeat if desired)
Note: The ISL59911 Configuration Register address pointer
auto-increments after each data read: repeat this step to read
multiple sequential bytes of data from the Configuration Register.
STOP Command
Signals the ending of serial I/O
R
S
T Serial Bus
A
R
Address
T
Register
Address
E
S
T Serial Bus
A
R
Address
T
Data
Read*
S
T
O
AP
C
a a a a a a a 0 AAAAAAAA a a a a a a a 1
K
A
A
C
C
A
C
d
d
d
d
d
d
d
d
K
K
K
* The Data Read step may be repeated to
read from the ISL59911’s Configuration
Register sequentially, beginning at the
Register Address written in the previous two
steps.
FIGURE 18. CONFIGURATION REGISTER READ
15
FN7548.0
September 2, 2011