ISL62391_11 Datasheet, PDF (14/20 Pages) Intersil Corporation – High-Efficiency, Triple-Output System Power Supply Controller

ISL62391, ISL62392, ISL62391C, ISL62392C
over the entire load range. This will produce the best transient
response to all load conditions, but will have increased
light-load power loss. If FCCM is forced low, the ISL62391,
ISL62392, ISL62391C and ISL62392C will automatically
operate in Diode Emulation Mode (DEM) at light load to
optimize efficiency in the entire load range. The transition is
automatically achieved by detecting the load current and
turning off LGATE when the inductor current reaches 0A.
Positive-going inductor current flows from either the source
of the high-side MOSFET, or the drain of the low-side
MOSFET. Negative-going inductor current flows into the
drain of the low-side MOSFET. When the low-side MOSFET
conducts positive inductor current, the phase voltage will be
negative with respect to the GND and PGND pins.
Conversely, when the low-side MOSFET conducts negative
inductor current, the phase voltage will be positive with
respect to the GND and PGND pins. The ISL62391,
ISL62392, ISL62391C and ISL62392C monitor the phase
voltage when the low-side MOSFET is conducting inductor
current to determine its direction.
When the output load current is greater than or equal to ½
the inductor ripple current, the inductor current is always
positive, and the converter is always in CCM. The ISL62391,
ISL62392, ISL62391C and ISL62392C minimize the
conduction loss in this condition by forcing the low-side
MOSFET to operate as a synchronous rectifier.
When the output load current is less than ½ the inductor
ripple current, negative inductor current occurs. Sinking
negative inductor through the low-side MOSFET lowers
efficiency through unnecessary conduction losses. The
ISL62391, ISL62392, ISL62391C and ISL62392C
automatically enter DEM after the PHASE pin has detected
positive voltage and LGATE was allowed to go high for 8
consecutive PWM switching cycles. The ISL62391,
ISL62392, ISL62391C and ISL62392C will turn off the low-
side MOSFET once the phase voltage turns positive,
indicating negative inductor current. The ISL62391,
ISL62392, ISL62391C and ISL62392C will return to CCM on
the following cycle after the PHASE pin detects negative
voltage, indicating that the body diode of the low-side
MOSFET is conducting positive inductor current.
Efficiency can be further improved with a reduction of
unnecessary switching losses by reducing the PWM
frequency. It is characteristic of the R³ architecture for the
PWM frequency to decrease while in diode emulation. The
extent of the frequency reduction is proportional to the
reduction of load current. Upon entering DEM, the PWM
frequency makes an initial step-reduction because of a 33%
step-increase of the window voltage V_W.
Because the switching frequency in DEM is a function of
load current, very light load conditions can produce
frequencies well into the audio band. This can be
problematic if audible noise is coupled into audio amplifier
circuits. To prevent this from occurring, the ISL62391,
ISL62392, ISL62391C and ISL62392C allow the user to float
the FCCM input. This will allow DEM at light loads, but will
prevent the switching frequency from going below ~28kHz to
prevent noise injection to the audio band. A timer is reset
each PWM pulse. If the timer exceeds 30µs, LGATE is
turned on, causing the ramp voltage to reduce until another
UGATE is commanded by the voltage loop.
Overcurrent Protection
The overcurrent protection (OCP) setpoint is programmed
with resistor, R_OCSET, that is connected across the OCSET
and PHASE pins.
L
PHASE1
ISL62391,
ISL62392
DCR
I_L
+
V_DCR
_
R_OCSET
C_SEN
10µA
OCSET1
+ ^VROCSET ^_
R_O
ISEN1
V_O
C_O
FIGURE 26. OVERCURRENT-SET CIRCUIT
Figure 26 shows the overcurrent-set circuit for SMPS1. The
inductor consists of inductance L and the DC resistance
(DCR). The inductor DC current I_L creates a voltage drop
across DCR, which is given by Equation 6:
V_DCR = I_L • DCR
(EQ. 6)
The ISL62391, ISL62392, ISL62391C and ISL62392C sink a
10µA current into the OCSET1 pin, creating a DC voltage
drop across the resistor R_OCSET, which is given by
Equation 7:
V_ROCSET = 10μA • R_OCSET
(EQ. 7)
Resistor R_O is connected between the ISEN1 pin and the
actual output voltage of the converter. During normal
operation, the ISEN1 pin is a high impedance path, therefore
there is no voltage drop across R_O. The DC voltage
difference between the OCSET1 pin and the ISEN1 pin can
be established using Equation 8:
V_OCSET1–V_ISEN1 = I_L • DCR – 10μA • R_OCSET
(EQ. 8)
The ISL62391, ISL62392, ISL62391C and ISL62392C
monitor the OCSET1 pin and the ISEN1 pin voltages. Once
the OCSET1 pin voltage is higher than the ISEN1 pin voltage
for more than 10µs, the ISL62391, ISL62392, ISL62391C and
ISL62392C declare an OCP fault. The value of R_OCSET is
then written as Equation 9:
R_OCSET
=
-^I-^O-----^C-----^•--^D-----^C-----^R---
10 μ A
(EQ. 9)
14
FN6666.5
April 7, 2011