ISL6310 Datasheet, PDF (13/27 Pages) Intersil Corporation – Two-Phase Buck PWM Controller with High Current Integrated MOSFET Drivers

ISL6310
If the R-C network components are selected such that the
R-C time constant matches the inductor L/DCR time
constant, then V_DROOP is equal to the sum of the voltage
drops across the individual DCRs, multiplied by a gain. As
Equation 8 shows, V_DROOP is therefore proportional to the
total output current, I_OUT.
V_DROOP
=
R_{-----C----O-----M-----P-}
R_S
⋅
I_OUT
⋅
DCR
(EQ. 8)
PHASE1
PHASE2
ISUM
V_L(s)
L
DCR
INDUCTOR
IL₁
R_S
L
DCR
INDUCTOR
IL₂
R_S
I_OUT
V_OUT
C_OUT
Once the desired output offset voltage has been determined,
use the following formulas to set R_OFS:
For Positive Offset (connect R_OFS to GND):
R_OFS
=
----⁰---^.--⁵-----^â‹---^R----¹-----
V_OFFSET
(EQ. 9)
For Negative Offset (connect R_OFS to VCC):
R_OFS
=
----¹---^.--⁵-----^â‹---^R----¹-----
V_OFFSET
(EQ. 10)
VDIFF
+
V_{OFS R1}
-
VREF
E/A
FB
I_OFS
ICOMP
-
C_COMP ^RCOMP
DROOP
V_DROOP
+
IREF
ISL6310
C_SUM
(OPTIONAL)
FIGURE 7. DCR SENSING CONFIGURATION
By simply adjusting the value of R_S, the load line can be set
to any level, giving the converter the right amount of droop at
all load currents. It may also be necessary to compensate for
any changes in DCR due to temperature. These changes
cause the load line to be skewed, and cause the R-C time
constant to not match the L/DCR time constant. If this
becomes a problem a simple negative temperature
coefficient resistor network can be used in the place of
R_COMP to compensate for the rise in DCR due to
temperature.
Output Voltage Offset Programming
The ISL6310 allows the designer to accurately adjust the offset
voltage by connecting a resistor, R_OFS, from the OFS pin to
VCC or GND. When R_OFS is connected between OFS and
VCC, the voltage across it is regulated to 1.5V. This causes a
proportional current (I_OFS) to flow into the OFS pin and out of
the FB pin. If R_OFS is connected to ground, the voltage across
it is regulated to 0.5V, and I_OFS flows into the FB pin and out of
the OFS pin. The offset current flowing through the resistor
between VDIFF and FB will generate the desired offset voltage
which is equal to the product (I_OFS x R₁). These functions are
shown in Figures 8 and 9.
13
R_OFS
OFS
ISL6310
GND
+
0.5V
-
-
1.5V
+
GND
VCC
FIGURE 8. POSITIVE OFFSET OUTPUT VOLTAGE
PROGRAMMING
VDIFF
-
V_{OFS R1}
+
VREF
E/A
FB
I_OFS
VCC
R_OFS
OFS
ISL6310
+
0.5V
-
-
1.5V
+
GND
VCC
FIGURE 9. NEGATIVE OFFSET OUTPUT VOLTAGE
PROGRAMMING
FN9209.4
August 7, 2008