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ISL23315_15 Datasheet, PDF (13/20 Pages) Intersil Corporation – Single, Low Voltage Digitally Controlled Potentiometer(XDCP™)
ISL23315
Typical Performance Curves (Continued)
1V/DIV
1µs/DIV
WIPER
1V/DIV
0.1s/DIV
SCL 9TH CLOCK OF THE
DATA BYTE (ACK)
FIGURE 21. WIPER LARGE SIGNAL SETTLING TIME
FIGURE 22. POWER-ON START-UP IN VOLTAGE DIVIDER MODE
CH1: 0.5V/DIV, 0.2µs/DIV RH PIN
CH2: 0.2V/DIV, 0.2µs/DIV RW PIN
RTOTAL = 10k
-3dB FREQUENCY = 1.4MHz AT MIDDLE TAP
FIGURE 23. 10k -3dB CUT OFF FREQUENCY
1.2
1.0
0.8
VCC = 5.5V, VLOGIC = 5.5V
0.6
0.4
VCC = 1.7V, VLOGIC = 1.2V
0.2
0
-40
-15
10
35
60
85
110
TEMPERATURE (°C)
FIGURE 24. STANDBY CURRENT vs TEMPERATURE
Functional Pin Descriptions
Potentiometers Pins
RH AND RL
The high (RH) and low (RL) terminals of the ISL23315 are
equivalent to the fixed terminals of a mechanical potentiometer.
RH and RL are referenced to the relative position of the wiper and
not the voltage potential on the terminals. With WR set to 255
decimal, the wiper will be closest to RH, and with the WR set to 0,
the wiper is closest to RL.
RW
RW is the wiper terminal, and it is equivalent to the movable
terminal of a mechanical potentiometer. The position of the
wiper within the array is determined by the WR register.
Bus Interface Pins
SERIAL DATA INPUT/OUTPUT (SDA)
The SDA is a bidirectional serial data input/output pin for I2C
interface. It receives device address, operation code, wiper
address and data from an I2C external master device at the
rising edge of the serial clock SCL, and it shifts out data after
each falling edge of the serial clock.
SDA requires an external pull-up resistor, since it is an open drain
input/output.
SERIAL CLOCK (SCL)
This input is the serial clock of the I2C serial interface. SCL
requires an external pull-up resistor, since a master is an open
drain output.
13
FN7778.2
August 12, 2015