ISL6269B_14 Datasheet, PDF (12/16 Pages) Intersil Corporation – High-Performance Notebook PWM Controller With Audio-Frequency Clamp

ISL6269B
R2
C1
C2
COMP
- ^FB
EA
+
REF
FSET
R3™ MODULATOR
VO
VIN
R1
R_FSET
C_FSET
VOUT
VIN
UG
PHASE
GATE DRIVERS
LG
GND
ISL6269B
Q_{HIGH_SIDE}
L_OUT
DCR
Q_{LOW_SIDE}
C_OUT
C_ESR
FIGURE 4. COMPENSATION REFERENCE CIRCUIT
Your local Intersil representative can provide a PC-based tool that
can be used to calculate compensation network component
values and help simulate the loop frequency response. The
compensation network consists of the internal error amplifier of the
ISL6269B and the external components R1, R2, C1 and C2 as well
as the frequency setting components R_FSET and C_FSET, are
identified in the schematic Figure 4.
General Application Design
Guide
This design guide is intended to provide a high-level explanation of
the steps necessary to create a single-phase power converter. It is
assumed that the reader is familiar with many of the basic skills
and techniques referenced. In addition to this guide, Intersil
provides complete reference designs that include schematics, bills
of materials and example board layouts.
Selecting the LC Output Filter
The duty cycle of an ideal buck converter is a function of the
input and the output voltage. This relationship is written as:
D
=
-^V----^O----^U----^T--
V_IN
(EQ. 9)
The output inductor peak-to-peak ripple current is written as:
I_p-p
=
V_{-----O----U----T-----}_--_---1_{-----–----}D_-----
f_SW  L_OUT
(EQ. 10)
A typical step-down DC/DC converter will have an I_P-P of 20% to
40% of the maximum DC output load current. The value of I_P-P is
selected based upon several criteria such as MOSFET switching
loss, inductor core loss and the resistive loss of the inductor
winding. The DC copper loss of the inductor can be estimated by:
P_COPPER = I_LOAD2  DCR
(EQ. 11)
Where I_LOAD is the converter output DC current.
The copper loss can be significant so attention has to be given to
the DCR selection. Another factor to consider when choosing the
inductor is its saturation characteristics at elevated temperature.
A saturated inductor could cause destruction of circuit
components, as well as nuisance OCP faults.
A DC/DC buck regulator must have output capacitance C_OUT into
which ripple current I_P-P can flow. Current I_P-P develops a
corresponding ripple voltage V_P-P across C_OUT, which is the sum
of the voltage drop across the capacitor ESR and of the voltage
change stemming from charge moved in and out of the
capacitor. These two voltages are written as:
V_ESR = I_P-P  ESR
(EQ. 12)
and
V_C
=
--------------^I--^P----^--^P----------------
8

C_O
U
T

f
S
W
(EQ. 13)
If the output of the converter has to support a load with high
pulsating current, several capacitors will need to be paralleled to
reduce the total ESR until the required V_P-P is achieved. The
inductance of the capacitor can cause a brief voltage dip if the
load transient has an extremely high slew rate. Low inductance
capacitors constructed with reverse package geometry are
available. A capacitor dissipates heat as a function of RMS current
and frequency. Be sure that I_P-P is shared by a sufficient quantity
of paralleled capacitors so that they operate below the maximum
rated RMS current at f_SW. Take into account that the rated value of
a capacitor can fade as much as 50% as the DC voltage across it
increases.
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FN6280.3
November 17, 2014