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DG526 Datasheet, PDF (12/16 Pages) Intersil Corporation – Analog CMOS Latchable Multiplexers
DG526, DG527, DG528, DG529
Truth Tables
DG526
Latching
A3 A2 A1 A0 EN WR RS ON SWITCH
XXXXX
1 Maintains
Previous
Switch State
Reset
X X X X X X 0 None
(Latches
Cleared)
Trans-
XXXX0 0 1
parent
Operation 0 0 0 0 1 0 1
0001101
None
1
2
0010101
3
0011101
4
0100101
5
0101101
6
0110101
7
0111101
8
1000101
9
1001101
10
1010101
11
1011101
12
1100101
13
1101101
14
1110101
15
1111101
16
Logic “0” = VAL, VENL ≤ 0.8V
DG527
Latching
A2 A1 A0 EN WR RS ON SWITCH
XXXX
1 Maintains
Previous
Switch State
Reset
X X X X X 0 None
(Latches
Cleared)
Trans-
XXX0 0 1
parent
Operation 0 0 0 1 0 1
001101
None
1
2
010101
3
011101
4
100101
5
101101
6
110101
7
111101
8
Logic “1” = VAH, VENH ≥ 2.4V
DG528
A2 A1 A0 EN WR RS
ON SWITCH
XXXX
1 Maintains Previous
Switch Condition
X X X X X 0 None (Latches Cleared)
XXX0 0 1
None
000101
1
001101
2
010101
3
011101
4
100101
5
101101
6
110101
7
111101
8
DG529
A1 A0 EN WR
X
X
X
X
X
X
X
X
X
0
0
0
0
1
0
0
1
1
0
1
0
1
0
1
1
1
0
Logic “1”: VAH ≥ 2.4V
Logic “0”: VAL ≤ 0.8V
RS
ON SWITCH
1 Maintains Previous Switch
Condition
0 None (Latches Cleared)
1
None
1
1
1
2
1
3
1
4
12-12