English
Language : 

ISL7457SRH Datasheet, PDF (11/12 Pages) Intersil Corporation – Radiation Hardened, SEE Hardened, Non-Inverting, Quad CMOS Driver
Layout Characteristics
Step and Repeat: 2390 µm x 2445 µm
The DELAY pad is not bonded.
ISL7457SRH
TABLE 1. LAYOUT X-Y COORDINATES
PAD NAME
X
(µm)
Y
DX
DY PROBES
(µm) (µm) (µm) PER PAD
IND
675
190
140
140
1
VS-
OUTD
995
190
140
140
1
2118
490
122
133
1
OUTC
2118
795
122
133
1
VH
2118
1039 122
345
2
2118
1211
OUTB
2118
1554 122
133
1
OUTA
2118
1861 122
133
1
VS+
1015
2140 140
140
1
INA
608
2140 140
140
1
OE
213
1993 140
140
1
INB
213
1673 140
140
1
VL
213
1331 140
345
2
213
1159
GND
213
864
140
140
1
DELAY
213
585
140
140
0
INC
213
213
140
140
1
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
11
FN6874.0
March 16, 2009