ISL7457SRH Datasheet, PDF (1/12 Pages) Intersil Corporation – Radiation Hardened, SEE Hardened, Non-Inverting, Quad CMOS Driver

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Data Sheet
March 16, 2009
ISL7457SRH
FN6874.0
Radiation Hardened, SEE Hardened,
Non-Inverting, Quad CMOS Driver
The ISL7457SRH is a radiation hardened, SEE hardened,
high speed, non-inverting, quad CMOS driver. It is capable
of running at clock rates up to 40MHz and features 2A
typical peak drive capability and a nominal on-resistance of
just 3.5Ω. The ISL7457SRH is ideal for driving highly
capacitive loads, such as storage and vertical clocks in CCD
applications. It is also well suited to level-shifting and
clock-driving applications.
Each output of the ISL7457SRH can be switched to either
the high (V_H) or low (V_L) supply pins, depending on the
related input pin. The inputs are compatible with both 3.3V
and 5V CMOS logic. The output enable (OE) pin can be
used to put the outputs into a high-impedance state. This is
especially useful in CCD applications, where the driver
should be disabled during power down.
The ISL7457SRH also features very fast rise and fall times
which are typically matched to within 1ns. The propagation
delay is also matched between rising and falling edges to
typically within 1.5ns.
The ISL7457SRH is available in a 16 lead ceramic flatpack
package and specified for operation over the full -55°C to
+125°C ambient temperature range.
Specifications for Rad Hard QML devices are controlled
by the Defense Supply Center in Columbus (DSCC). The
SMD numbers listed here must be used when ordering.
Detailed Electrical Specifications for these devices are
contained in SMD 5962-08230. A “hot-link” is provided
on our website for downloading.
Pinouts
ISL7457SRH
16 LD FLATPACK
TOP VIEW
INA
OE
INB
V_L
GND
NC
INC
IND
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8
9
V_S+
OUTA
OUTB
NC
V_H
OUTC
OUTD
V_S-
Features
• Electrically Screened to SMD 5962-08230
• QML Qualified per MIL-PRF-38535 Requirements
• Full Mil-temp Range Operation . . . . T_A = -55°C to +125°C
• Radiation Hardness
- TID [50-300 rad(Si)/s] . . . . . . . . . . . . . . . 10krad(Si) min
• SEE Hardness
- LET (SEL and SEB Immunity) . . . . 40MeV/mg/cm² min
- LET [SET = ΔV_OUT < 15V, Δt < 500ns] 40MeV/mg/cm²
min
• 4 Channels
• Clocking Speeds up to 40MHz
• 11ns/12ns Typical t_R/t_F with 1nF Load (15V bias)
• 1ns Typical Rise and Fall Time Match (15V bias)
• 1.5ns Typical Prop Delay Match (15V bias)
• Low Quiescent Current - < 1mA Typical
• Fast Output Enable Function - 12ns Typical (15V bias)
• Wide Output Voltage Range
- 0V ≤ V_L ≤ 8V
- 2.5V ≤ V_H ≤ 16.5V
• 2A Typical Peak Drive Current (15V Bias)
• 3.5Ω Typical On-Resistance (15V bias)
• Input Level Shifters
• 3.3V/5V CMOS Compatible Inputs
Applications
• CCD Drivers, Clock/line Drivers, Level-Shifters
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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