ISL6296A Datasheet, PDF (11/20 Pages) Intersil Corporation – FlexiHash For Battery Authentication

HOST
TX
OP_OE_pN_e-_nD_-DR_rA_aiI_nN
PO_PR_oT_rt-P_PiI_nN
RX
ISL6296A
V_DDH
V_DDD
R_PU
ES^D
D^DIⁱO^oD^deE
EESSD
DDIOioDdeE
1.5μA 6pF
DEVICE
RX
TX
FIGURE 8. THE CIRCUIT MODEL FOR THE XSD SERIAL BUS
XSD
tb
t0
t1
tg
GgLlIiTtcChH
1
0
BRreEaAkK
BT
FIGURE 9. THE BUS SIGNAL TIMING DIAGRAM
TABLE 2. HOST TIMING DEFINITIONS OF SYMBOLS AND BUS SIGNALING
PARAMETER SYM
DESCRIPTION
MIN
TYP
Bit Time
BT_H x = 0.5, 1, 2, or 4
De-glitch Period
tg
PW (Pulse Width) less than this will result in a frame error
173.6/x
‘1’ Pulse Width
t1_H PW in this range will be interpreted as a ‘1’ code
0.227
‘0’ Pulse Width
t0_H PW in this range will be interpreted as a ‘0’ code
0.591
‘Break’ Time
tb_H PW in this range will be interpreted as a ‘break’ command
1
NOTE: Unless otherwise stated, all pulse width (PW) referenced are with respect to an active-low pulse.
MAX
0.124
0.453
0.824
100
PARAMETER
Bit Time
‘1’ Pulse Width
‘0’ Pulse Width
‘Break’ Time
SYM
BT_D
t1_D
t0_D
tb_D
TABLE 3. DEVICE TIMING DEFINITIONS OF SYMBOLS AND BUS SIGNALING
DESCRIPTION
MIN
TYP
x = 0.5, 1, 2, or 4
164.2/x 172.8/x
‘1’ code transmit pulse width
0.304
‘0’ code transmit pulse width
0.696
PW in this range will be interpreted as a ‘break’ command
1.391
MAX
181.4/x
UNIT
µs
BT_H
BT_H
BT_H
BT_H
UNIT
µs
BT_D
BT_D
BT_D
11
FN6567.3
April 15, 2010