ISL6557A Datasheet, PDF (10/19 Pages) Intersil Corporation – Multi-Phase PWM Controller for Core-Voltage Regulation

ISL6557A
TABLE 1. VOLTAGE IDENTIFICATION CODES (Continued)
VID4
VID3
VID2
VID1
VID0 VDAC
0
1
1
1
1
1.175
0
1
1
1
0
1.200
0
1
1
0
1
1.225
0
1
1
0
0
1.250
0
1
0
1
1
1.275
0
1
0
1
0
1.300
0
1
0
0
1
1.325
0
1
0
0
0
1.350
0
0
1
1
1
1.375
0
0
1
1
0
1.400
0
0
1
0
1
1.425
0
0
1
0
0
1.450
0
0
0
1
1
1.475
0
0
0
1
0
1.500
0
0
0
0
1
1.525
0
0
0
0
0
1.550
OVERVOLTAGE PROTECTION
The ISL6557A detects output voltages above 2.1V and
immediately commands all PWM outputs low. This directs
the Intersil drivers turn on the lower MOSFETs and protect
the load by preventing any further increase in output voltage.
Once the output voltage falls to the level set by the VID code,
the PWM outputs enter high-impedance mode. The Intersil
drivers respond by turning off both upper and lower
MOSFETs. If the overvoltage condition reoccurs, the
ISL6557A will again command the lower MOSFETs to turn
on. The ISL6557A will continue to protect the load in this
fashion as long as the overvoltage repeats.
After detecting an overvoltage condition, the ISL6557A
ceases normal PWM operation until it is reset by power cycle
in which VCC is removed below the POR falling threshold
and restored above the POR rising threshold as described in
Enable and Disable and Electrical Specifications.
LOAD-LINE REGULATION
In applications with high transient current slew rates, the
lowest-cost solution for maintaining regulation often requires
some kind of controlled output impedance. Pin 8 of the
ISL6557A carries a current proportional to the average
current of all active channels. The current is equivalent to
I_AVG in Figures 5 and 7. Connecting FB and IOUT together
forces I_AVG into the summing node of the error amplifier and
produces a voltage drop across the feedback resistor, R_FB,
proportional to the output current. In Figure 7, the steady-
state value of V_DROOP is simply
V_DROOP = I_AVG R_FB
(EQ. 3)
In the case that each channel uses the same value for RISEN to
sense channel current, and this is almost always true, a more
complete expression for VDROOP can be determined from the
expression for IAVG as it is derived from Figures 4 and 5.
I_AVG
=
-^I-^O-----^U----^T--
N
r_{---D----S----(--O-----N----)}
R_ISEN
V_DROOP
=
-^I-^O-----^U----^T--
N
r_{---D----S----(--O----N-----)}
R_ISEN
R_FB
(EQ. 4)
ENABLE AND DISABLE
The internal power-on reset circuit (POR) prevents the
ISL6557A from starting before the bias voltage at VCC
reaches the POR-rising threshold as defined in Electrical
Specifications.The POR level is high enough to guarantee
that all parts of the ISL6557A can perform their functions
properly. Built-in hysteresis assures that once enabled, the
ISL6557A will not turn off unless the bias voltage falls to
approximately 0.5V below the POR-rising level. When VCC
is below the POR-rising threshold, the PWM outputs are held
in a high-impedance state to assure the drivers remain off.
ISL6557A INTERNAL CIRCUIT EXTERNAL CIRCUIT
+5V
VCC
+12V
POR
CIRCUIT
OV LATCH
SIGNAL
ENABLE
COMPARATOR
+
10.7kΩ
EN
-
1.40kΩ
1.23V (± 2%)
FIGURE 8. START-UP CONDITION USING THRESHOLD-
SENSITIVE ENABLE (EN) FUNCTION
After power on, the ISL6557A remains in shut-down mode
until the voltage at the enable input (EN) rises above 1.23V
(±2%). This optional feature prevents the ISL6557A from
operating until the connected voltage rail is available and
above some selectable threshold. For example, the HIP660X
family of MOSFET driver ICs require 12V bias, and in certain
circumstances, it can be important to assure that the drivers
reach their POR level before the ISL6557A becomes
enabled. The schematic in Figure 8 demonstrates
coordination of the ISL6557A with HIP660X family of
MOSFET driver ICs. The enable comparator has about
70mV of hysteresis to prevent bounce. To defeat the
threshold-sensitive enable, connect EN to VCC.
The 11111 VID code is reserved as a signal to the controller
that no load is present. The controller will enter shut-down
mode after receiving this code and will start up upon
receiving any other code.
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