ISL6524_14 Datasheet, PDF (10/16 Pages) Intersil Corporation – VRM8.5 PWM and Triple Linear Power System Controller

TABLE 1. OUT1 OUTPUT VOLTAGE PROGRAM
VID3
PIN NAME
VID2
VID1
VID0
VID25
NOMINAL
DACOUT
VOLTAGE
0
1
0
0
0
1.050
0
1
0
0
1
1.075
0
0
1
1
0
1.100
0
0
1
1
1
1.125
0
0
1
0
0
1.150
0
0
1
0
1
1.175
0
0
0
1
0
1.200
0
0
0
1
1
1.225
0
0
0
0
0
1.250
0
0
0
0
1
1.275
1
1
1
1
0
1.300
1
1
1
1
1
1.325
1
1
1
0
0
1.350
1
1
1
0
1
1.375
1
1
0
1
0
1.400
1
1
0
1
1
1.425
1
1
0
0
0
1.450
1
1
0
0
1
1.475
1
0
1
1
0
1.500
1
0
1
1
1
1.525
1
0
1
0
0
1.550
1
0
1
0
1
1.575
1
0
0
1
0
1.600
1
0
0
1
1
1.625
1
0
0
0
0
1.650
1
0
0
0
1
1.675
0
1
1
1
0
1.700
0
1
1
1
1
1.725
0
1
1
0
0
1.750
0
1
1
0
1
1.775
0
1
0
1
0
1.800
0
1
0
1
1
1.825
NOTE: 0 = connected to GND, 1 = open or connected to 3.3V
through pull-up resistors
Application Guidelines
Soft-Start Interval
Initially, the soft-start function clamps the error amplifier’s output
of the PWM converter. This generates PHASE pulses of
increasing width that charge the output capacitor(s). The
resulting output voltages start-up as shown in Figure 6.
The soft-start function controls the output voltage rate of rise
to limit the current surge at start-up. The soft-start interval
and the surge current are programmed by the soft-start
capacitor, C_SS. Programming a faster soft-start interval
increases the peak surge current. Using the recommended
0.1mF soft start capacitors ensure all output voltages ramp
10
up to their set values in a quick and controlled fashion, while
meeting the system timing requirements.
Shutdown
The PWM output does not switch until the soft-start voltage
(V_SS13) exceeds the oscillator’s valley voltage. Additionally,
the reference on each linear’s amplifier is clamped to the soft-
start voltage. Holding the SS24 pin low (with an open drain or
open collector signal) turns off regulators 1, 2 and 3.
Regulator 4 (MCH) will simply drop its output to the
intermediate soft-start level. This output is not allowed to
violate the 2V maximum potential gap to the ATX 3.3V output.
Layout Considerations
MOSFETs switch very fast and efficiently. The speed with
which the current transitions from one device to another
causes voltage spikes across the interconnecting
impedances and parasitic circuit elements. The voltage
spikes can degrade efficiency, radiate noise into the circuit,
and lead to device overvoltage stress. Careful component
layout and printed circuit design minimizes the voltage
spikes in the converter. Consider, as an example, the turn-off
transition of the upper MOSFET. Prior to turn-off, the upper
MOSFET was carrying the full load current. During the turn-
off, current stops flowing in the upper MOSFET and is picked
up by the lower MOSFET or Schottky diode. Any inductance
in the switched current path generates a large voltage spike
during the switching interval. Careful component selection,
tight layout of the critical components, and short, wide circuit
traces minimize the magnitude of voltage spikes.
There are two sets of critical components in a DC-DC
converter using an ISL6524 controller. The switching power
components are the most critical because they switch large
amounts of energy, and as such, they tend to generate
equally large amounts of noise. The critical small signal
components are those connected to sensitive nodes or
those supplying critical bypass current.
The power components and the controller IC should be
placed first. Locate the input capacitors, especially the high-
frequency ceramic decoupling capacitors, close to the power
switches. Locate the output inductor and output capacitors
between the MOSFETs and the load. Locate the PWM
controller close to the MOSFETs.
The critical small signal components include the bypass
capacitor for VCC and the soft-start capacitor, C_SS. Locate
these components close to their connecting pins on the
control IC. Minimize any leakage current paths from any SS
node, since the internal current source is only 28mA.
A multi-layer printed circuit board is recommended. Figure
10 shows the connections of the critical components in the
converter. Note that the capacitors C_IN and C_OUT each
could represent numerous physical capacitors. Dedicate one
solid layer for a ground plane and make all critical
component ground connections with vias to this layer.
FN9015.3
April 18, 2005