ISL6523 Datasheet, PDF (10/16 Pages) Intersil Corporation – VRM8.5 Dual PWM and Dual Linear Power System Controller

ISL6523
Layout Considerations
MOSFETs switch very fast and efficiently. The speed with
which the current transitions from one device to another
causes voltage spikes across the interconnecting
impedances and parasitic circuit elements. The voltage
spikes can degrade efficiency, radiate noise into the circuit,
and lead to device overvoltage stress. Careful component
layout and printed circuit design minimizes the voltage
spikes in the converter. Consider, as an example, the turn-off
transition of the upper MOSFET. Prior to turn-off, the upper
MOSFET was carrying the full load current. During the turn-
off, current stops flowing in the upper MOSFET and is picked
up by the lower MOSFET or Schottky diode. Any inductance
in the switched current path generates a large voltage spike
during the switching interval. Careful component selection,
tight layout of the critical components, and short, wide circuit
traces minimize the magnitude of voltage spikes.
There are two sets of critical components in a DC-DC
converter using an ISL6523 controller. The switching power
components are the most critical because they switch large
amounts of energy, and as such, they tend to generate
equally large amounts of noise. The critical small signal
components are those connected to sensitive nodes or
those supplying critical bypass current.
The power components and the controller IC should be
placed first. Locate the input capacitors, especially the high-
frequency ceramic de-coupling capacitors, close to the
power switches. Locate the output inductor and output
capacitors between the MOSFETs and the load. Locate the
PWM controller close to the MOSFETs.
The critical small signal components include the bypass
capacitor for VCC and the soft-start capacitor, C_SS. Locate
these components close to their connecting pins on the
control IC. Minimize any leakage current paths from any SS
node, since the internal current source is only 28µA.
A multi-layer printed circuit board is recommended. Figure 9
shows the connections of the critical components in the
converter. Note that the capacitors C_IN and C_OUT each
could represent numerous physical capacitors. Dedicate one
solid layer for a ground plane and make all critical
component ground connections with vias to this layer.
Dedicate another solid layer as a power plane and break this
plane into smaller islands of common voltage levels. The
power plane should support the input power and output
power nodes. Use copper filled polygons on the top and
bottom circuit layers for the PHASE nodes, but do not
unnecessarily oversize these particular islands. Since the
PHASE nodes are subjected to very high dV/dt voltages, the
stray capacitor formed between these islands and the
surrounding circuitry will tend to couple switching noise. Use
the remaining printed circuit layers for small signal wiring.
The wiring traces from the control IC to the MOSFET gate
and source should be sized to carry 2A peak currents.
+5V_IN
L_IN
V_OUT2
C_IN
+12V
C_OCSET2 ^CVCC
VCC GND
C_OCSET1
R_OCSET2
Q3
L_OUT2
C_OUT2 CR2
OCSET2 _OCSET1
UGATE2
UGATE1
PHASE2
PHASE1
R_OCSET1
Q1
L_OUT1
V_OUT1
C_SS24,13
V_OUT3
LGATE1
SS24
Q2
SS13
ISL6523
C_OUT1
CR1
V_OUT4
C_OUT3
Q4
DRIVE3 DRIVE4
PGND
C_OUT4
Q5
+3.3V_IN
KEY
ISLAND ON POWER PLANE LAYER
ISLAND ON CIRCUIT PLANE LAYER
VIA/THROUGH-HOLE CONNECTION TO GROUND PLANE
FIGURE 9. PRINTED CIRCUIT BOARD POWER PLANES AND
ISLANDS
PWM1 Controller Feedback Compensation
Both PWM controllers use voltage-mode control for output
regulation. This section highlights the design consideration
for a voltage-mode controller requiring external
compensation. Apply these methods and considerations
only to the synchronous PWM controller. The considerations
for the standard PWM controller are presented separately.
10