ISL6442 Datasheet, PDF (10/16 Pages) Intersil Corporation – Dual (180° Out-of-Phase) PWM and Linear Controller

ISL6442
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
0
5
10 15 20 25 30 35 40
RT (kΩ)
FIGURE 10. FREQUENCY vs RT RESISTOR
Output Regulation
Figure 11 shows the generic feedback resistor circuit for any
of the three V_OUT’s; the V_OUT is divided down to equal the
reference. All three use a 0.6V internal reference (check the
“Electrical Specifications” Table on page 4 for the exact
reference value at 24V). The R_UP is connected to the V_OUT;
the R_LOW to GND; the common point goes to the FB pin.
V_OUT
R_UP
FB
COMP
EA
R_LOW
0.6V
FIGURE 11. OUTPUT REGULATION
V_OUT must be greater than 0.6V and 2 resistors are needed,
and their accuracy directly affect the regulator tolerance.
FB
=
V_OUT
⋅
----------^R----^L----^O----^W-------------
R_UP + R_LOW
(EQ. 4)
Use Equation 5 to choose the resistor values. R_UP is part of
the compensation network for the switchers, and should be
selected to be compatible; 1kΩ to 5kΩ is a good starting
value. Find FB from the “Electrical Specifications” Table on
page 5 (for the right condition), plug in the desired value for
V_OUT, and solve for R_LOW.
R_LOW
=
---^F----^B------^â‹---^R----^U-----^P----
V_OUT – FB
(EQ. 5)
The maximum duty cycle of the ISL6442 approaches 100%
at low frequency, but falls off at higher frequency; see the
“Electrical Specifications” Table on page 5. In addition, there
is a minimum UGATE pulse width, in order to properly sense
overcurrent. The two switchers are 180° out of phase.
The linear output voltage is restricted to approximately a 1V to
4V range. VIN3 should be equal or less than VCC (in order to
be sure that LCDR can turn off the PNP). Note that the linear
output is off until the rising POR trips; it does not have a
soft-start ramp, and it does NOT shut off, unless VCC goes
back below the falling POR trip point. It is suggested that using
one of the switcher outputs as the input to the linear allows it to
be ramped and enabled/disabled with that switcher.
Protection Mechanisms
OCP - (Function independent for both PWM). The overcurrent
function protects the PWM Converter from a shorted output by
using the upper MOSFET’s ON-resistance, r_DS(ON) to monitor
the current. This method enhances the converter’s efficiency
and reduces cost by eliminating a current sensing resistor. The
overcurrent function cycles the soft-start function in a hiccup
mode to provide fault protection. A resistor connected to the
drain of the upper MOSFET and OCSET pin programs the
overcurrent trip level. The PHASE node voltage will be
compared against the voltage on the OCSET pin, while the
upper MOSFET is on. A current (typically 110µA) is pulled from
the OCSET pin to establish the OCSET voltage. If PHASE is
lower than OCSET while the upper MOSFET is on then an
overcurrent condition is detected for that clock cycle. The upper
gate pulse is immediately terminated, and a counter is
incremented. If an overcurrent condition is detected for 32
consecutive clock cycles, and the circuit is not in soft-start, the
ISL6442 enters into the soft-start hiccup mode. During hiccup,
the external capacitor on the SS/EN pin is discharged, then
released and a soft-start cycle is initiated. During soft-start,
pulse termination current limiting is enabled, but the 32-cycle
hiccup counter is held in reset until soft-start is completed.
Figure 12 shows an example of the hiccup mode. As the
SS2/EN2 is pulled below the enable trip point, VOUT2 shuts
off, and the voltage goes to GND, at which time the output
current goes to zero. As SS2/EN2 rises above the enable
trip point, the output tries to turn on, the current spikes up,
and then is held constant (by the pulse-termination current
limiting); the output voltage rises, but not up to the desired
value. When the SS2/EN2 ramp reaches ~3V, the cycle
repeats, and can continue indefinitely. If the short-circuit is
removed, the output will ramp up with the next soft-start, and
normal operation will resume. VOUT1 and SS1/EN1 will
independently function the same way.
GND>
VOUT2 (2V/DIV)
0A>
I_OUT2 (2A/DIV)
GND>
SS2/EN2 (1V/DIV)
FIGURE 12. OVERCURRENT PROTECTION
10
FN9204.2
October 31, 2008