ISL6444_07 Datasheet, PDF (1/19 Pages) Intersil Corporation – Dual PWM Controller with DDR Memory Option for Gateway Applications

®
Data Sheet
April 12, 2007
ISL6444
FN9069.3
Dual PWM Controller with DDR Memory
Option for Gateway Applications
The ISL6444 PWM controller provides high efficiency and
regulation for two output voltages adjustable in the range from
0.9V to 5.5V that are required to power I/O, chip-sets, and
memory banks in high-performance notebook computers,
PDAs, and Internet appliances.
Synchronous rectification and hysteretic operation at light
loads contribute to a high efficiency over a wide range of
loads. The hysteretic mode of operation can be disabled
separately on each PWM converter if continuous conduction
operation is desired for all load levels. Efficiency is even
further enhanced by using MOSFET’s r_DS(ON) as a current
sense component.
Feed-forward ramp modulation, current mode control
scheme, and internal feed-back compensation provide fast
response to load transients. Out-of-phase operation with a
180^o phase shift reduces the input current ripple.
The controller can be transformed in a complete DDR
memory power supply solution by activating a DDR pin. In
DDR mode of operation one of the channels tracks the
output voltage of another channel and provides output
current sink and source capability–features essential for
proper powering of DDR chips. The buffered reference
voltage required by this type of memory is also provided.
The ISL6444 monitors the output voltages. Each PWM
controller generates a PGOOD (power good) signal when
the soft-start is completed and the output is within ±10% of
the set point.
A built-in overvoltage protection prevents output voltage
from going above 115% of the set point. Normal operation
automatically restores when the overvoltage conditions go
away. Undervoltage protection latches the chip off when
either output drops below 75% of its set value after the
soft-start sequence for this output is completed. An
adjustable overcurrent function monitors the output current
by sensing the voltage drop across the lower MOSFET. If
precision current-sensing is required, an external current-
sense resistor may optionally be used.
The IC comes in a 28 Ld SSOP package.
Features
• Provides regulated output voltage in the range 0.9V to 5.5V
- High efficiency over wide load range
- Synchronous buck converter with hysteretic operation at
light load
• Complete DDR memory power solution
- VTT tracks VDDQ/2
- VDDQ/2 buffered reference output
• No current-sense resistor required
- Uses MOSFET’s r_DS(ON)
- Optional current-sense resistor for precision overcurrent
• Undervoltage lock-out on VCC pin
• Dual mode operation
- Operates directly from battery 5.0V to 24V input
- Operates from 3.3V or 5V system rail
• Excellent dynamic response
- Combined voltage feed-forward and current mode
control
• Power-good signal for each channel
• 300kHz switching frequency
- Out-of-phase operation for reduced input ripple
- In-phase operation in DDR mode for reduced channel
interference
- Out-of-phase operation with 90° phase shift for
two-stage conversion in DDR mode
• Pb-free plus anneal available (RoHS compliant)
Applications
• _{Residential and Enterprise Gateways}
• DSL Modems
• Routers and Switchers
Ordering Information
PART
NUMBER
PART
MARKING
TEMP.
RANGE
(°C)
PKG.
PACKAGE DWG. #
ISL6444CA* ISL 6444CA -10 to +85 28 Ld QSOP M28.15
ISL6444CAZ* ISL 6444CAZ -10 to +85 28 Ld QSOP M28.15
(Note)
(Pb-free)
*Add “-T” suffix for tape and reel.
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100%
matte tin plate termination finish, which are RoHS compliant and
compatible with both SnPb and Pb-free soldering operations. Intersil
Pb-free products are MSL classified at Pb-free peak reflow
temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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