HCTS193MS Datasheet, PDF (1/9 Pages) Intersil Corporation – Radiation Hardened Synchronous 4-Bit Up/Down Counter

HCTS193MS
September 1995
Radiation Hardened
Synchronous 4-Bit Up/Down Counter
Features
Pinouts
• 3 Micron Radiation Hardened CMOS SOS
• Total Dose 200K RAD (Si)
• SEP Effective LET No Upsets: >100 MEV-cm²/mg
• Single Event Upset (SEU) Immunity < 2 x 10^-9 Errors/Bit-
Day (Typ)
• Dose Rate Survivability: >1 x 10¹² RAD (Si)/s
• Dose Rate Upset >10¹⁰ RAD (Si)/s 20ns Pulse
16 LEAD CERAMIC DUAL-IN-LINE
METAL SEAL PACKAGE (SBDIP)
MIL-STD-1835 CDIP2-T16
TOP VIEW
P1 1
Q1 2
Q0 3
16 VCC
15 P0
14 MR
• Latch-Up Free Under Any Conditions
CPD 4
13 TCD
• Fanout (Over Temperature Range)
- Standard Outputs - 10 LSTTL Loads
• Military Temperature Range: -55^oC to +125^oC
• Significant Power Reduction Compared to LSTTL ICs
• DC Operating Voltage Range: 4.5V to 5.5V
CPU 5
Q2 6
Q3 7
GND 8
12 TCU
11 PL
10 P2
9 P3
• LSTTL Input Compatibility
- VIL = 0.8V Max
- VIH = VCC/2 Min
• Input Current Levels Ii ≤ 5µA at VOL, VOH
16 LEAD CERAMIC METAL SEAL
Description
FLATPACK PACKAGE (FLATPACK)
MIL-STD-1835 CDFP4-F16
The Intersil HCTS193MS is a Radiation Hardened 4-bit binary
TOP VIEW
UP/DOWN synchronous counter.
P1
1
16
VCC
Presetting the counter to the number on the preset data inputs
Q1
2
15
P0
(P0 - P3) is accomplished by a low on the asynchronous parallel
Q0
3
14
MR
load input (PL). The counter is incremented on the low to high ^CPD
4
13
TCD
transition of the clock-up input (high on the clock-down), ^CPU
5
12
TCU
decremented on the low to high transition of the clock-down input
Q2
6
11
PL
(high on the clock-up). A high level on the MR input overrides any
Q3
7
10
P2
other input to clear the counter to zero. The Terminal Count Up _GND
8
9
P3
goes low half a clock period before the zero count is reached and
returns high at the maximum count. The Terminal Count Down
mode goes low half a clock period before the maximum count
and returns high at the maximum count.
The HCTS193MS utilizes advanced CMOS/SOS technology to
achieve high-speed operation. This device is a member of
radiation hardened, high-speed, CMOS/SOS Logic Family.
The HCTS193MS is supplied in a 16 lead Ceramic flatpack
(K suffix) or a SBDIP Package (D suffix).
Ordering Information
PART NUMBER
HCTS193DMSR
HCTS193KMSR
HCTS193D/Sample
HCTS193K/Sample
HCTS193HMSR
TEMPERATURE RANGE
-55^oC to +125^oC
-55^oC to +125^oC
+25^oC
+25^oC
+25^oC
SCREENING LEVEL
Intersil Class S Equivalent
Intersil Class S Equivalent
Sample
Sample
Die
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
592
PACKAGE
16 Lead SBDIP
16 Lead Ceramic Flatpack
16 Lead SBDIP
16 Lead Ceramic Flatpack
Die
Spec Number 518620
File Number 3066.1