DG201 Datasheet, PDF (1/7 Pages) Intersil Corporation – CMOS Quad SPST Analog Switch

Data Sheet
DG201
January 2000 File Number 3115.4
CMOS Quad SPST Analog Switch
The DG201 solid state analog switch is designed using an
improved, high voltage CMOS monolithic technology. It
provides ease-of-use and performance advantages not
previously available from solid state switches. Destructive
latch-up of solid state analog gates have been eliminated by
Intersil’s CMOS technology.
The DG201 is completely specification and pinout
compatible with the industry standard devices.
Ordering Information
TEMP. RANGE
PART NUMBER
(^oC)
PACKAGE
DG201CJ
0 to 70
16 Ld PDIP
PKG.
NO.
E16.3
Functional Diagram
S
IN
N
P
D
DG201 SWITCH CELL
TRUTH TABLE
LOGIC
DG201
0
ON
1
OFF
Features
• Switches Greater than 28V_P-P Signals with ±15V Supplies
• Break-Before-Make Switching
- t_OFF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 250ns
- t_ON . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 700ns
• TTL, DTL, CMOS, PMOS Compatible
• Non-Latching with Supply Turn-Off
• Complete Monolithic Construction
• Industry Standard (DG201)
Applications
• Data Acquisition
• Sample and Hold Circuits
• Operational Amplifier Gain Switching Networks
Pinout
DG201 (PDIP)
TOP VIEW
IN₁ 1
D₁ 2
S₁ 3
V- 4
GND 5
S₄ 6
D₄ 7
IN₄ 8
16 IN₂
15 D₂
14 S₂
13 V+(SUBSTRATE)
12 V_REF
11 S₃
10 D₃
9 IN₃
SWITCHES SHOWN FOR LOGIC “1” INPUT
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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