83C51KB Datasheet, PDF (9/19 Pages) Intel Corporation – HIGH PERFORMANCE KEYBOARD MICROCONTROLLER

83C51KB HIGH PERFORMANCE KEYBOARD MICROCONTROLLER
Table 6. 83C51KB Signal Description
Signal
Name
Type
Description
Alternate
Function
P3.7:0
PSEN#^†
I/O Port 3. This is an 8-bit quasi-bidirectional I/O port (see CLK1:0, DATA,
LED3:0).
O Program Store Enable. This output is asserted for external program —
memory fetch operations. It is not available for keyboard applications.
RCIN
RD#^†
I Resonant Clock Input. RC resonator generated by connecting 1% preci-
sion resistor to V_CC or provide an external clock input from an external
clock device.
O Read . Read signal output for external data memory read operations. LED3
It is not available for keyboard applications.
RST
I Reset. Asserting RST when the chip is in idle mode or powerdown
—
mode returns the chip to normal operation. This signal is input only.
When power is applied to the chip, the internal reset signal remains
high for approximately 80ms to 260ms (see the datasheet for current
specifications). The reset circuit then deactivates and does not re-
activate unless V_CC drops below the crossover at approximately
3VDC.
V_CC
PWR Supply Voltage. Connect this pin to the +5V supply voltage.
—
V_SS
WR#^†
GND Circuit Ground. Connect this pin to ground.
O Write. Write signal output for external data memory write operations.
It is not available for keyboard applications.
—
LED2
† _{The descriptions of RD#, WR#, ALE, P’SEN#, A15:8/P2.7:0 and AD7:0/P0.7:0 are documented for the}
standard MCS 51 microcontrollers. They are not used for these functions in keyboard applications.
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