316972-004 Datasheet, PDF (622/884 Pages) Intel Corporation – Intel I/O Controller Hub 9

SATA Controller Registers (D31:F5)
15.2 Bus Master IDE I/O Registers (D31:F5)
The bus master IDE function uses 16 bytes of I/O space, allocated via the BAR register,
located in Device 31:Function 2 Configuration space, offset 20h. All bus master IDE I/O
space registers can be accessed as byte, word, or dword quantities. Reading reserved
bits returns an indeterminate, inconsistent value, and writes to reserved bits have no
affect (but should not be attempted). These registers are only used for legacy
operation. Software must not use these registers when running AHCI. The description
of the I/O registers is shown in Table 15-2.
Table 15-2. Bus Master IDE I/O Register Address Map
BAR+
Offset
00
01
Mnemonic
Register
BMICP
—
Command Register Primary
Reserved
02
BMISP Bus Master IDE Status Register Primary
03
04–07
08
09
—
BMIDP
BMICS
—
Reserved
Bus Master IDE Descriptor Table Pointer
Primary
Command Register Secondary
Reserved
0Ah
BMISS Bus Master IDE Status Register Secondary
0Bh
0Ch–0Fh
—
BMIDS
Reserved
Bus Master IDE Descriptor Table Pointer
Secondary
Default
Type
00h
—
00h
—
xxxxxxxxh
00h
—
00h
—
xxxxxxxxh
R/W
RO
R/W, R/
WC, RO
RO
R/W
R/W
RO
R/W, R/
WC, RO
RO
R/W
622
Intel^® I/O Controller Hub 9 (ICH9) Family Datasheet