QGE7520MC-SL8EE Datasheet, PDF (44/282 Pages) Intel Corporation – Intel® E7520 Memory Controller Hub (MCH)

Register Descriptions
PCISTS is a 16-bit status register that reports the occurrence of error events on Device 0’s PCI
interface. Since MCH Device 0 does not physically reside on a real PCI bus, many of the bits are
not implemented.
Bit
Field
15
14
13
12
11
10:9
8
7
6:5
4
3:0
Default &
Access
Description
0b
R/WC
Detected Parity Error (DPE).
0 = No parity error detected.
1 = MCH detected an address or data parity error on the HI interface.
0b
R/WC
0b
RO
0b
R/WC
0b
RO
00b
RO
0b
RO
1b
RO
00b
1b
RO
0h
Signaled System Error (SSE).
0 = Software clears this bit by writing a ‘1’ to the bit location.
1 = MCH Device 0 generates an SERR message over HI for any enabled Device 0
error condition. Device 0 error conditions are enabled in the PCICMD and
ERRCMD registers. Device 0 error flags are read/reset from the PCISTS or Error
registers.
Received Master Abort Status (RMAS). The ICH will never send up a Master Abort
completion.
Received Target Abort Status (RTAS).
0 = Software clears this bit by writing a ‘1’ to the bit location.
1 = MCH generated a HI request that received a Target Abort.
Signaled Target Abort Status (STAS). The MCH will not generate a Target Abort on
the HI.
DEVSEL Timing (DEVT). Device 0 does not physically connect to PCI_A. These bits
are set to 00 (fast decode) so that optimum DEVSEL timing for PCI_A is not limited by
the MCH.
Master Data Parity Error Detected (DPD). PERR signaling and messaging are not
implemented by the MCH.
Fast Back-to-Back (FB2B). Device 0 does not physically connect to PCI_A. This bit is
set to ‘1’ (indicating fast back-to-back capability) so that the optimum setting for PCI_A
is not limited by the MCH.
Reserved
Capability List (CLIST). Indicates to the configuration software that this
device/function implements a list of new capabilities. A list of new capabilities is
accessed via register CAPPTR at configuration address offset 34h.
Reserved
44
Intel^® E7520 Memory Controller Hub (MCH) Datasheet