273159-006 Datasheet, PDF (4/86 Pages) Intel Corporation – 80960JA/JF/JD/JS/JC/JT 3.3 V Embedded 32-Bit Microprocessor

Contents
Figures
1 80960Jx Microprocessor Package Options .................................................................................. 7
2 80960Jx Block Diagram.............................................................................................................. 10
3 132-Lead Pin Grid Array Top View-Pins Facing Down............................................................... 23
4 132-Lead Pin Grid Array Bottom View-Pins Facing Up .............................................................. 24
5 132-Lead PQFP - Top View ....................................................................................................... 27
6 196-Ball Mini Plastic Ball Grid Array Top View-Balls Facing Down ............................................ 30
7 196-Ball Mini Plastic Ball Grid Array Bottom View-Balls Facing Up ........................................... 31
8 VCC5 Current-Limiting Resistor ................................................................................................. 36
9 VCCPLL Lowpass Filter ............................................................................................................. 37
10 A.C. Test Load............................................................................................................................ 45
11 Output Delay or Hold vs. Load Capacitance–80960JS/JC/JT (3.3 V Signals) .......................... 46
12 Output Delay or Hold vs. Load Capacitance–80960JS/JC/JT (5 V Signals) ............................. 46
13 Output Delay or Hold vs. Load Capacitance–80960JA/JF/JD .................................................... 47
14 T_LX vs. AD Bus Load Capacitance–80960JS/JC/JT (3.3 V Signals) ......................................... 47
15 T_LX vs. AD Bus Load Capacitance–80960JS/JC/JT (5 V Signals) ............................................ 48
16 T_LX vs. AD Bus Load Capacitance–80960JA/JF/JD................................................................... 48
17 I_CC Active (Power Supply) vs. Frequency–80960JA/JF ............................................................. 49
18 80960JA/JF I_CC Active (Thermal) vs. Frequency ....................................................................... 49
19 80960JD I_CC Active (Power Supply) vs. Frequency ................................................................... 50
20 80960JD I_CC Active (Thermal) vs. Frequency ............................................................................ 50
21 80960JC I_CC Active (Power Supply) vs. Frequency ................................................................... 51
22 80960JC I_CC Active (Thermal) vs. Frequency ............................................................................ 51
23 80960JS I_CC Active (Power Supply) vs. Frequency ................................................................... 52
24 80960JS I_CC Active (Thermal) vs. Frequency ............................................................................ 52
25 CLKIN Waveform........................................................................................................................ 53
26 T_OV1 Output Delay Waveform .................................................................................................... 53
27 T_OF Output Float Waveform ....................................................................................................... 54
28 T_IS1 and T_IH1 Input Setup and Hold Waveform .......................................................................... 54
29 T_IS2 and T_IH2 Input Setup and Hold Waveform .......................................................................... 54
30 T_IS3 and T_IH3 Input Setup and Hold Waveform .......................................................................... 55
31 T_IS4 and T_IH4 Input Setup and Hold Waveform .......................................................................... 55
32 T_LX, T_LXL and T_LXA Relative Timings Waveform ........................................................................ 56
33 DT/R# and DEN# Timings Waveform......................................................................................... 56
34 TCK Waveform ........................................................................................................................... 57
35 T_BSIS1 and T_BSIH1 Input Setup and Hold Waveforms................................................................. 57
36 T_BSOV1 and T_BSOF1 Output Delay and Output Float Waveform ................................................. 57
37 T_BSOV2 and T_BSOF2 Output Delay and Output Float Waveform ................................................. 58
38 T_BSIS2 and T_BSIH2 Input Setup and Hold Waveform................................................................... 58
39 80960JS/JC/JT Device Identification Register Fields ................................................................. 60
40 80960JD Device Identification Register Fields ........................................................................... 61
41 80960JA/JF Device Identification Register Fields ...................................................................... 62
42 Non-Burst Read and Write Transactions Without Wait States, 32-Bit Bus................................. 69
43 Burst Read and Write Transactions Without Wait States, 32-Bit Bus ........................................ 70
44 Burst Write Transactions With 2,1,1,1 Wait States, 32-Bit Bus .................................................. 71
45 Burst Read and Write Transactions Without Wait States, 8-Bit Bus .......................................... 72
46 Burst Read and Write Transactions With 1, 0 Wait States
and Extra Tr State on Read, 16-Bit Bus ..................................................................................... 73
47 Double Word Read Bus Request, Misaligned One Byte From
Quad Word Boundary, 32-Bit Bus, Little Endian ........................................................................ 74
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Datasheet