273159-006 Datasheet, PDF (17/86 Pages) Intel Corporation – 80960JA/JF/JD/JS/JC/JT 3.3 V Embedded 32-Bit Microprocessor

80960JA/JF/JD/JS/JC/JT 3.3 V Embedded 32-Bit Microprocessor
Table 7. Pin Description Nomenclature
Symbol
I
O
I/O
–
S
A (...)
Description
Input pin only.
Output pin only.
Pin may be either an input or output.
Pin must be connected as described.
Synchronous. Inputs must meet setup and hold times relative to CLKIN for proper operation.
S(E) Edge sensitive input
S(L) Level sensitive input
Asynchronous. Inputs may be asynchronous relative to CLKIN.
A(E) Edge sensitive input
A(L) Level sensitive input
While the processor’s RESET# pin is asserted, the pin:
R (...)
R(1) is driven to V_CC
R(0) is driven to V_SS
R(Q) is a valid output
R(X) is driven to unknown state
R(H) is pulled up to V_CC
While the processor is in the hold state, the pin:
H (...)
H(1) is driven to V_CC
H(0) is driven to V_SS
H(Q) Maintains previous state or continues to be a valid output
H(Z) Floats
While the processor is halted, the pin:
P (...)
P(1) is driven to V_CC
P(0) is driven to V_SS
P(Q) Maintains previous state or continues to be a valid output
Datasheet
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