80C186EB Datasheet, PDF (35/59 Pages) Intel Corporation – 16-BIT HIGH-INTEGRATION EMBEDDED PROCESSORS

80C186EB 80C188EB 80L186EB 80L188EB
AC SPECIFICATIONS
AC Characteristics 80L186EB13 80L186EB8 (Continued)
Symbol
Parameter
13 MHz
Min Max
8 MHz
Min
Max
SYNCHRONOUS INPUTS
T_CHIS
TEST NMI INT4 0
20
25
BCLK1 0 T1 0IN READY
CTS1 0 P2 6 P2 7
T_CHIH
TEST NMI INT4 0 T1 0IN
3
3
BCLK1 0 READY CTS1 0
T_CLIS
AD15 0 (AD7 0) READY
20
25
T_CLIH
READY AD15 0 (AD7 0)
3
3
T_CLIS
HOLD
20
25
T_CLIH
HOLD
3
3
NOTES
1 See AC Timing Waveforms for waveforms and definition
2 Measured at V_IH for high time V_IL for low time
3 Only required to guarantee I_CC Maximum limits are bounded by T_C T_CH and T_CL
4 Specified for a 50 pF load see Figure 13 for capacitive derating information
5 Specified for a 50 pF load see Figure 14 for rise and fall times outside 50 pF
6 See Figure 14 for rise and fall times
7 T_CHOV1 applies to BHE (RFSH) LOCK and A19 16 only after a HOLD release
8 T_CHOV2 applies to RD and WR only after a HOLD release
9 Setup and Hold are required to guarantee recognition
10 Setup and Hold are required for proper operation
Units
ns
ns
ns
ns
ns
ns
Notes
19
19
1 10
1 10
19
19
35
35