GD82559C Datasheet, PDF (16/60 Pages) Intel Corporation – Intel-Based Electronic Classroom Student Computing Station Based on the Intel® Celeron™ Processor and Intel® 810 Chipset

Intel-Based Electronic Classroom Student Computing Station
5.2.2
5.2.2.1
The Intel^® 82801 I/O Controller Hub (ICH)
The 82801 I/O Controller Hub (ICH) employs the Intel Accelerated Hub Architecture to make a
direct connection from the graphics and memory to the integrated AC97 controller, the IDE
controllers, dual USB ports, and PCI add-in cards.
The Accelerated Hub Architecture provides twice the bandwidth of the PCI bus at 266 MB per
second. This allows a wider flow of rich information from the I/O controller to the memory
controller, with optimized arbitration rules allowing more functions to run concurrently, enabling
more life-like audio and video.
The Integrated Audio-Codec 97 controller enables software audio and modem by using the
processor to run sound and modem software. By reusing existing system resources, this feature
adds flexibility, improves sound quality, and lowers the system BOM cost by eliminating
components.
The 82802 Firmware Hub (FWH) stores system BIOS and video BIOS, eliminating a redundant
nonvolatile memory component. In addition, the 82802 contains a hardware Random Number
Generator (RNG). The Intel RNG provides truly random numbers to enable fundamental security
building blocks supporting stronger encryption, digital signing, and security protocols.
Design Notes for the Intel^® 82801 ICH
• ICH Placement: The ICH should be placed within 8” of the ATA connector(s). There are no
minimum length requirements for this spacing.
• Capacitance: The capacitance of each pin of the IDE connector on the host should be below
25 pF when the cables are disconnected from the host.
• Series Termination: There is no need for series termination resistors on the data and control
signals since series termination is integrated into these signal lines on the ICH.
• A 1 KΩ pull-up to 5 V is required on PIORDY and SIORDY.
• A 470 Ω pull-down resistor is required on pin 28 of each connector.
• A 5.6 KΩ pull-down resistor is required on PDREQ and SDREQ.
• Support Cable Select (CSEL) is a PC99 requirement. The state of the cable select pin
determines the master/slave configuration of the hard drive at the end of the cable.
• Primary IDE connector uses IRQ14 and the secondary IDE connector uses IRQ15.
• IRQ14 and IRQ15 each need an 8.2 KΩ pull-up resistor to V_CC.
• Due to the elimination of the ISA bus from the ICH, PCI_RST# should be connected to pin 1
of the IDE connectors as the IDE reset signal. Due to high loading, the PCI_RST# signal
should be buffered.
• There is no internal pull up or down on PDD7 or SDD7 of the ICH. Devices should not have a
pull-up resistor on DD7. It is recommended that a host have a 10 KΩ pull-down resistor on
PDD7 and SDD7 to allow the host to recognize the absence of a device at power-up (as
required by the ATA-4 specification).
• If no IDE is implemented with the ICH, the input signals (xDREQ and xIORDY) can be
grounded and the output signals left as no connects.
16
Application Note