82US15W Datasheet, PDF (16/22 Pages) Intel Corporation – Intel® System Controller Hub

Errata
Implication: In PIO mode at the time of an upstream SDIO completion cycle, a downstream
completion targeting any other Intel SCH Quality device/controller causes the SDIO
data to be forced to 0 on the FSB I/F, hence CPU reads/shows a 0 (zero).
Workaround:Use only DMA mode transfer.
Status:
For the steppings affected, see the Summary Tables of Changes.
16.
Deadlock Causes Hang Condition Entering L1
Problem:
In systems that include a PCIe device that could request entry to L1, a deadlock may
occur while transitioning to L1, thus causing a hang condition.
Implication: If a downstream device requests to go into L1 and the link goes to recovery before L1 is
entered, the Intel SCH will experience an internal deadlock, thus hanging the system.
Workaround:If the system hangs while running a device that may request entry to L1, disable L1.
Status:
For the steppings affected, see the Summary Tables of Changes.
17.
Unrecognized USB Device
Problem:
USB devices connected to an individual port may not be recognized or may fail to
operate after reboot, S3 resu me or during normal operation. At previously specified
nominal Intel SCH core voltage levels (1.05V +/- 5%), this behavior is most prevalent
on USB Port 0, but other ports can exhibit this behavior.
Implication: USB devices can fail to be reported to the end user by the OS. USB devices can fail to
operate during operation.
Workaround:Set target voltage for the Intel SCH VCC (core voltage) to 1.10V +/-5%. See the table
below for updated specifications on affected voltage planes.
Voltage Rail
Intel SCH V_CC (core)
Intel SCH V_TT (FSB I/O)
CPU V_CCP & CPU V_CCPC6 (FSB I/O)
Minimum
-5%
-10%
-10%
Voltage
Set Point
1.1V
1.1V
1.1V
Maximum
+5%
+5%
+5%
Status:
For the steppings affected, see the Summary Tables of Changes.
18.
PCIE PCIHCT WHQL test hang
Problem:
System will hang if PCIe port is en abled and not populated, and there are multiple
writes to the Slot Capabilities Register.
Implication: WHQL PCIHCT test fails if there is no card in the PCIe slot.
Workaround:Disable any unpopulated PCIe port, or populate the port.
Status:
For the steppings affected, see the Summary Tables of Changes.
19.
EHCI Controller Hang
Problem:
The EHCI host controller may hang if it is processing the schedule and system software
accesses EHCI controller PCI configuration space registers 0xC0-0xCF, 0xDC-0xDF, or
0xF0-0xF3
Implication: The BIOS may soft hang during boot; OR t he system may hard-hang during OS
operation; OR USB2.0 devices may fail to operate properly during OS operation.
Workaround:BIOS should remove all accesses to the listed PCI config registers while the schedule is
running, except for 0xC0 (function disable) which can be do ne before EHCI init.
Specialized software that accesses PCI configuration space should be avoided, or
modified to avoid these registers.
Status:
For the steppings affected, see the Summary Tables of Changes.
16
Specification Update