LUPXA255A0C200 Datasheet, PDF (15/40 Pages) Intel Corporation – Electrical, Mechanical, and Thermal Specification

Package Information
Table 3. Pin and Signal Descriptions for the PXA255 Processor (Sheet 7 of 9)
Pin Name
Type
Signal Descriptions
Reset State
AC97 Controller and I²S Controller Pins
BITCLK/
GPIO[28]
ICOCZ
AC97 audio port bit clock. (input) AC97 clock is
generated by Codec 0 and fed into the PXA255
processor processor and Codec 1.
AC97 Aaudio port bit clock. (output) AC97 clock is
generated by the PXA255 processor.
I²S bit clock. (input) I²S clock is generated externally
and fed into PXA255 processor.
I²S bit clock. (output) I²S clock is generated by the
PXA255 processor.
Pulled High -
Note[1]
SDATA_IN0/
GPIO[29]
AC97 audio port data in. (input) Input line for Codec 0. _{Pulled High -}
ICOCZ _{I2S data in. (input) Input line for the I2S controller.}
Note[1]
SDATA_IN1/
GPIO[32]
ICOCZ
AC97 audio port data in. (input) Input line for Codec 1.
I²S system clock. (output) System clock from I²S
controller.
Pulled High -
Note[1]
SDATA_OUT/
GPIO[30]
ICOCZ
AC97 audio port data out. (output) Output from the
PXA255 processor to Codecs 0 and 1.
I²S data out. (output) Output line for the I²S controller.
Pulled High -
Note[1]
SYNC/
GPIO[31]
ICOCZ
AC97 audio port sync signal. (output) Frame sync
signal for the AC97 controller.
I²S sync. (output) Frame sync signal for the I²S
controller.
Pulled High -
Note[1]
nACRESET OC
I²C Controller Pins
SCL
ICOCZ
SDA
ICOCZ
AC97 audio port reset signal. (output)
I²C clock. (bidirectional)
I²C data. (bidirectional).
Driven Low
Hi-Z
Hi-Z
PWM Pins
PWM[1:0]/
GPIO[17:16]
ICOCZ Pulse width modulation channels 0 and 1. (outputs)
Pulled High -
Note[1]
DMA Pins
DREQ[1:0]/
GPIO[19:20]
ICOCZ
DMA request. (input) Notifies the DMA Controller that an
external device requires a DMA transaction. DREQ[1] is
Pulled High -
Note[1]
GPIO[19]. DREQ[0] is GPIO[20].
GPIO Pins
GPIO[1:0]
General purpose I/O. Wakeup sources on both rising
ICOCZ _{and falling edges on nRESET.}
Pulled High -
Note[1]
GPIO[14:2]
ICOCZ ^{General purpose I/O. More wakeup sources for sleep}
mode.
Pulled High -
Note[1]
GPIO[22:21]
General purpose I/O. Additional General Purpose I/O
ICOCZ
pins.
Pulled High -
Note[1]
Crystal and Clock Pins
PXTAL
3.6864 MHz crystal input. No external caps are
OA
required.
Note [2]
PEXTAL
IA
3.6864 MHz crystal output. No external caps are
required.
Note [2]
TXTAL
OA
32 KHz crystal input. No external caps are required.
Note [2]
Sleep State
Note [3]
Note [3]
Note [3]
Note [3]
Note [3]
Driven Low
Hi-Z
Hi-Z
Note [3]
Note [3]
Note [3]
Note [3]
Note [3]
Note [2]
Note [2]
Note [2]
Intel® PXA255 Processor Electrical, Mechanical, and Thermal Specification
15