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XC2220U Datasheet, PDF (85/105 Pages) Infineon Technologies AG – 16/32-Bit Single-Chip Microcontroller with 32-Bit Performance
XC2220U
XC2000 Family / Compact Line
Electrical Parameters
4.7.3 External Clock Input Parameters
These parameters specify the external clock generation for the XC2220U. The clock can
be generated in two ways:
• By connecting a crystal or ceramic resonator to pins XTAL1/XTAL2.
• By supplying an external clock signal. This clock signal can be supplied either to
pin XTAL1 (core voltage domain) or to pin CLKIN1 (IO voltage domain).
If connected to CLKIN1, the input signal must reach the defined input levels VIL and VIH.
If connected to XTAL1, a minimum amplitude VAX1 (peak-to-peak voltage) is sufficient for
the operation of the on-chip oscillator.
Note: The given clock timing parameters (t1 … t4) are only valid for an external clock
input signal.
Note: Operating Conditions apply.
Table 29 External Clock Input Characteristics
Parameter
Symbol
Values
Unit Note /
Min. Typ. Max.
Test Condition
Oscillator frequency
fOSC SR 4
−
40
MHz Input= Clock
Signal
4
−
16
MHz Input= Crystal
or Resonator
XTAL1 input current
absolute value
|IIL| CC −
−
20
μA
Input clock high time
t1 SR 6
−
−
ns
Input clock low time
t2 SR 6
−
−
ns
Input clock rise time
t3 SR −
8
8
ns
Input clock fall time
t4 SR −
8
8
ns
Input voltage amplitude on VAX1 SR 0.3 x −
−
V
fOSC≥ 4 MHz;
XTAL11)
VDDIM
fOSC≤ 16 MHz
0.4 x −
−
V
fOSC≥ 16 MHz;
VDDIM
fOSC≤ 25 MHz
0.5 x −
−
V
fOSC≥ 25 MHz;
VDDIM
fOSC≤ 40 MHz
Input voltage range limits VIX1 SR -1.7 + −
1.7 V
2)
for signal on XTAL1
VDDIM
1) The amplitude voltage VAX1 refers to the offset voltage VOFF. This offset voltage must be stable during the
operation and the resulting voltage peaks must remain within the limits defined by VIX1.
Data Sheet
81
V1.2, 2012-07