TLE7824G Datasheet, PDF (8/53 Pages) Infineon Technologies AG – Integrated double low-side switch, high-side/LED driver, hall supply, wake-up inputs and LIN communication with embedded MCU (24kB Flash)

Pin No. Symbol
4
LIN
24
SUPPLY
5
LS2
6
LS1
9
P0.3
10
P0.4
11
P0.5
13
V_DDC
14
TMS
15
P0.0
[TCK_0]
16
P0.2
[TDO_0]
17
P0.1
[TDI_0]
18
P2.0
19
P2.1
20
V_DDP
–
RxD
–
TxD
–
DI
–
DO
–
CLK
–
CSN
–
V_AREF
TLE7824G
Pin Definitions and Functions
Function
LIN Bus; Bus Line for the LIN interface, according to ISO 9141 and LIN specification
1.3 and 2.0
Supply Output; e.g. for Hall Sensor; controlled via SPI
Low Side Switch 2 Output; controlled via SPI
Low Side Switch 1 Output; controlled via SPI
General Purpose I/O with PWM Functionality
(alternate function: SCK, see XC885 data sheet)
General Purpose I/O with Capture and PWM Functionality
(alternate function: MTSR, see XC885 data sheet)
General Purpose I/O with PWM Functionality
(alternate function: MRST and EXINT0 ,see XC885 data sheet)
Voltage Regulator Output for μController Core (2.5 V); for connection of block
capacitor to GND; not to be used for external loads
Test Mode Select (JTAG)
General Purpose I/O; see XC885 data sheet
(alternate function: JTAG Clock Input)
General Purpose I/O; see XC885 data sheet
(alternate function: JTAG Serial Data Output; RxD1)
General Purpose I/O; see XC885 data sheet
(alternate function: JTAG Serial Data Input; TxD1)
General Purpose Input (digital/analog) with Capture Functionality; e.g. for Hall
Sensor (alternate function: EXINT1)
General Purpose Input (digital/analog) with Capture Functionality; e.g. for Hall
Sensor (alternate function: EXINT2)
Voltage Supply Input for μController I/Os (5 V); to be connected with V_CC pin
LIN Transceiver Data Output; according to the ISO 9141 and LIN specification 1.3
and 2.0; LOW in dominant state; connected to µC General Purpose Input P1.0
LIN Transceiver Data Input; according to ISO 9141 and LIN specification 1.3 and
2.0; TxD has an internal pull-up; connected to µC General Purpose Input P1.1
SPI Data Input; receives serial data from the control device; serial data transmitted
to DI is a 16-bit control word with the Least Significant Bit (LSB) transferred first: the
input has a pull-down and requires CMOS logic level inputs; DI will accept data on
the falling edge of CLK-signal; connected to µC General Purpose Input P1.3
SPI Data Output; this tri-state output transfers diagnosis data to the control device;
the output will remain in the high-impedance state unless the device is selected by a
low on Chip-Select-Not (CSN); connected to µC General Purpose Input P1.4
(EXTINT0_1)
SPI Clock Input; clock input for shift register; CLK has an internal pull-down and
requires CMOS logic level inputs; connected to µC General Purpose Input P1.2
SPI Chip Select Not Input; CSN is an active low input; serial communication is
enabled by pulling the CSN terminal low; CSN input should only be transitioned when
CLK is low; CSN has an internal pull-up and requires CMOS logic level inputs;
connected to µC General Purpose Input P1.5
Voltage Reference for ADC
Data Sheet
8
Rev. 3.01, 2008-04-15