TC1910 Datasheet, PDF (8/66 Pages) Infineon Technologies AG – 32-Bit Single-Chip Microcontroller

PRELIMINARY
Pin Configuration
TC1910
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16
A
AD20 AD26 AD28 _AD29 ^VDD_ _{XTAL1 XTAL2} ^VSS^_
RTC
PLL
V_{DD_} V_{DD_} V_{SSA_} BY
PLL COD0/1 COD0/1 ^{P A S S}
NMI
CLK
OUT
P 2 .3
P 2 .0
A
B ^{A D 1 7 A D 25 A D 27 A D 3 0 V S SA V D DP _ V SS P _ V D D_ A I0- A I1 - A O 1+ A O 0- H R S T E X IN 4 P 2 .5 P 3 .15} B
_32K
PLL
PLL GUARD
C
AD13
AD23
AD24
AD31
TM_
CTRL1
XTAL4
TM_
CTRL0
V_SS_
GUARD
V _{A GN D _}
COD
A I1+
AO0+
CODE
C _DIS
PORS
T
SSC_
MTSR
IIC _
SDA
EXIN 7
C
D
AD9
AD21 AD22
V_{DD_ XTAL3 VDDR}
PWR
V_{DD_}
OSCI
PLLCT
RL_A0
A I0 +
V _{A RE F_}
COD
AO1-
CEXT
V _{DD _}
PWR
SSC_ ASC0_ ASC1_
SCLK RX TX
D
E ^{AD8 AD18 AD16 AD19}
SSC _ ASC 0_ IIC _
MRST TX SCL
P 3 .11
E
F ^{AD7 AD15 AD14 AD12}
G ^{AD5 AD11 AD10 AD6}
H ^{AD2 AD4 AD3 AD0}
J
EBU
CLK
AD1
A23
A21
K
BF
CLK0
A22
A20
A19
L ^{A17 A18 A16 A13}
V_{DD_}
PWR2
V_{SS_}
GND
V _{SS_}
GND
V _{D D_}
PW R2
V_{DD_}
PWR
V_{SS_}
GND
V _{SS_}
GND
HS5
HS15 ^VSS_
GND
V _{SS_}
GND
HS4
V_{DD_ HS14 HS13} V_{DD_}
PWR2
PW R2
P 2.8 P 2.9 P 2 .4 E X IN 5 _F
P 2.1 P2.2 EXIN 6 P3.10 _G
GPTU. GPTU. GPTU. ASC1_
4
5
7
RX
H
GPTU. SCAN GPTU. GPTU.
0 MODE 6
3
J
LRCK
MU
TE
1
GPTU
2
.
GPTU.
1
K
V_DDSB EXIN3 SC LK M UT E0 _L
M ^{A15 A14 A12 A11}
P 1.7 EXIN0 EXIN 1 EXIN 2 _M
N ^{A10 A9}
A 8 ^{V D D _} R A S B C 0 C S 1 C S G LB A D V H S 11 H S 7 H S 0 ^V DD _ P 1.4 P 1 .5 P 1 .6
N
PWR
PWR
P
A7
A6
A5
A 1 R D /W R CS6
CS2
BAA
CKE HS10 HS6
BRK
OUT
TMS
P 1.0
P 1 .2 P 1 .3
P
R
A4
A3
A0
RD
BC1
CS4
CS0
CS
EMU
MR /W
ALE
HS8
HS2
BRK
IN
TDO
TCK
P 1 .1
R
T
A2
CAS
BC3
BC2
CS5
CS3
W AIT
CS
OVL
CM
DELAY
HS12
HS9
HS3
HS1 OCDSE TDI
TRST
T
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16
TOP VIEW
LBGA 208
Figure 3 TC1910 Pinning
Data Sheet
4
V 1.0, 2003-10