|
SED10HB100 Datasheet, PDF (7/18 Pages) Solid States Devices, Inc – Schottky Rectifier | |||
|
◁ |
1
Ultra Low Capacitance ESD Array
ESD3V3U4ULC
Ultra Low Capacitance ESD Array
1.1
Features
⢠ESD / Transient protection of high speed data lines exceeding :
⢠IEC61000-4-2 (ESD) : ±20 kV (air/contact)
⢠IEC61000-4-4 (EFT) : 2.5 kV (5/50ns)
⢠IEC61000-4-5 (Surge) : 3 A (8/20ns)
⢠Maximum working voltage: VRWM = 3.3 V
⢠Very low reverse current: IR = 1 nA (typical)
⢠Extremely low capacitance CL = 0.4 pF I/O to GND (typical)
⢠Very low reverse clamping voltage: VCL= 9 V at IPP = 16 A (typical)
⢠Very low forward clamping voltage: VFC= 6 V at IPP = 16 A (typical)
⢠Very low reverse dynamic resistance: Rdyn,rev = 0.2 ⦠(typical)
⢠TSLP-9-1 package with pad pitch 0.5 mm
⢠Optimized pad design to simplify PCB layout
⢠Pb-free and Halogen-Free package (RoHS compliant)
1.2
Application Examples
⢠USB 3.0, 10/100/1000 Ethernet, Firewire
⢠DVI, HDMI, S-ATA, DisplayPort, Mobile communication, LCD displays, Camera
⢠Consumer products (STB, MP3, DVD, DSC, ...) Notebooks and desktop computers, peripherals
2
Product Description
Pin 1 Pin 2
Pin 3
Pin 4 Pin 5
Pin 1 Pin 2 Pin 4 Pin 5
I/O
I/O
I/O
I/O
Pin 9 Pin 8
Pin 7 Pin 6
a) Pin configuration
Figure 1 a) Pin Configuration and b) Schematic Diagram
Table 1 Ordering information
Type
Package
ESD3V3U4ULC
PG-TSLP-9-1
Configuration
4 lines, uni-directional
Preliminary Data Sheet
7
GND
Pin 3
b) Schematic diagram
Marking code
Z2
Revision 0.9, 2010-10-14
|
▷ |