ICL5101_16 Datasheet, PDF (7/44 Pages) Infineon Technologies AG – Resonant controller IC with PFC for LED driver

Symbol
Pin
GND
4
PFCGD
5
PFCCS
6
PFCZCD 7
Datasheet
ICL5101
Pin Configuration and Description
Function
IC GND
This pin is connected to ground and represents the ground level of the IC for
the supply voltage, gate drive and sense signals.
PFC gate drive
The gate of the MOSFET in the PFC preconverter designed in boost
topology is controlled by this pin. There is an active L-level during UVLO and
a limitation of the max H-level at 11.0 V during normal operation. In order to
turn on the MOSFET softly (with a reduced di_DRAIN/dt), the gate drive voltage
rises within 245 ns from L-level to H-level. The fall time of the gate voltage is
less than 50 ns in order to turn off quickly. A resistor of typically 10 Ω is
recommended between the drive pin and gate in order to avoid oscillations
and in order to shift the power dissipation when discharging the gate
capacitance into this resistor. The PFC section of the IC controls a boost
converter as a PFC preconverter in discontinuous conduction mode (DCM).
Typically, the control starts with gate drive pulses with a fixed on-time of
typically 4.0 µs at V_ACIN = 230 V, increasing up to 24 µs and with an off-time
of 47 µs. As soon as sufficient zero current detector (ZCD) signals are
available, the operation mode changes from fixed frequency operation to
operation with variable frequency. The PFC works in critical conduction
mode operation (CrCM) when rated and/or medium load conditions are
present. That means triangular-shaped currents in the boost converter choke
without gaps and variable operating frequency. During low load (detected by
an internal compensator) we obtain operation with discontinuous conduction
mode (DCM) – that means triangular-shaped currents in the boost converter
choke with gaps when reaching the zero current level and variable operating
frequency in order to avoid steps in the consumed line current.
PFC current sense signal
The voltage drop across a shunt resistor located between the source of the
PFC MOSFET and GND is sensed with this pin. If the level exceeds a
threshold of 1.0 V for longer than 200 ns, the PFC gate drive is turned off as
long as the zero current detector (ZCD) enables a new cycle. If no ZCD
signal is available within 52 µs after turn-off of the PFC gate drive, a new
cycle is initiated from an internal start-up timer.
PFC zero crossing detection
This pin senses the point of time when the current through the boost inductor
becomes zero during the off-time of the PFC MOSFET in order to initiate a
new cycle.
The moment of interest appears when the voltage of the separate ZCD
winding changes from positive to negative level, which represents a voltage
of zero at the inductor windings and therefore the end of current flow from
the lower input voltage level to the higher output voltage level. There is a
threshold with hysteresis, 1.5 V for increasing level, 0.5 V for decreasing
level, which detects the change in inductor voltage. A resistor connected
between the ZCD winding and PIN 7 limits the sink and source current of the
sense pin when the voltage of the ZCD winding exceeds the internal
clamping levels (typically 6.3 V and -2.9 V @ 5 mA) of the IC. If the sensed
voltage level of the ZCD winding is not sufficient (e.g. during start-up), an
internal start-up timer will initiate a new cycle every 52 µs after turn-off of the
PFC gate drive. The source current out of this pin during the on-time of the
PFC-MOSFET indicates the voltage level of the AC supply voltage. During
low input voltage levels, the on-time of the PFC-MOSFET is enlarged in
order to minimize gaps in the line current during zero crossing of the line
voltage and improve the THD (Total Harmonic Distortion) of the line current.
Optimization of the THD is possible by trimming of the resistor between this
pin and the ZCD winding in combination with the inductance and used PFC
MOSFET.
7
Rev. 1.3, 2016-01-15