C517A Datasheet, PDF (60/72 Pages) Siemens Semiconductor Group – 8-Bit CMOS Microcontroller

C517A
AC Characteristics (18 MHz)
(Operating Conditions apply)
(C_L for port 0, ALE and PSEN outputs = 100 pF; C_L for all other outputs = 80 pF)
Program Memory Characteristics
Parameter
ALE pulse width
Address setup to ALE
Address hold after ALE
ALE low to valid instruction in
ALE to PSEN
PSEN pulse width
PSEN to valid instruction in
Input instruction hold after PSEN
Input instruction float after PSEN
Address valid after PSEN
Address to valid instr in
Address float to PSEN
Symbol
Limit Values
Unit
18 MHz
Clock
min. max.
Variable Clock
1/t_CLCL = 3.5 MHz to 18 MHz
min.
max.
t_LHLL
t_AVLL
t_LLAX
t_LLIV
t_LLPL
t_PLPH
t_PLIV
t_PXIX
t ^*)
PXIZ
t *)
PXAV
t_AVIV
t_AZPL
71 –
2 t_CLCL – 40
26 –
t_CLCL – 30
26 –
t_CLCL – 30
–
122 –
31 –
132 –
–
92
t_CLCL – 25
3 t_CLCL – 35
–
0
–
0
–
46 –
48 –
t_CLCL – 8
–
180 –
0
–
0
–
ns
–
ns
–
ns
4 t_CLCL – 100 ns
–
ns
–
ns
3 t_CLCL – 75 ns
–
ns
t_CLCL – 10
ns
–
ns
5 t_CLCL – 98 ns
–
ns
*) _{Interfacing the C517A to devices with float times up to 45 ns is permissible. This limited bus contention will not}
cause any damage to port 0 drivers.
CLKOUT Characteristics
Parameter
ALE to CLKOUT
CLKOUT high time
CLKOUT low time
CLKOUT low to ALE high
Symbol
Limit Values
Unit
18 MHz
Clock
min. max.
Variable Clock
1/t_CLCL = 3.5 MHz to 18 MHz
min.
max.
t_LLSH
349 –
7 t_CLCL – 40 –
ns
t_SHSL
71 –
2 t_CLCL – 40 –
ns
t_SLSH
516 –
10 t_CLCL – 40 –
ns
t_SLLH
16
96
t_CLCL – 40
t_CLCL + 40
ns
Semiconductor Group
58