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C517A Datasheet, PDF (52/72 Pages) Siemens Semiconductor Group – 8-Bit CMOS Microcontroller
C517A
Power Saving Modes
The C517A provides two basic power saving modes, the idle mode and the power down mode.
Additionally, a slow down mode is available. This power saving mode reduces the internal clock
rate in normal operating mode and it can be also used for further power reduction in idle mode.
– Idle mode
The CPU is gated off from the oscillator. All peripherals are still provided with the clock and
are able to work. Idle mode is entered by software and can be left by an interrupt or reset.
– Slow down mode
The controller keeps up the full operating functionality, but its normal clock frequency is
internally divided by 8. This slows down all parts of the controller, the CPU and all peripherals,
to 1/8th of their normal operating frequency and also reduces power consumption.
– Software power down mode
The operation of the C517A is completely stopped and the oscillator is turned off. This mode
is used to save the contents of the internal RAM with a very low standby current. This power
down mode is entered by software and can be left by reset.
– Hardware Power down mode
If pin HWPD gets active (low level) the part enters the hardware power down mode and starts
a complete internal reset sequence. Thereafter, both oscillators of the chip are stopped and
the port pins and several control lines enter a floating state.
In the power down mode of operation, VDD can be reduced to minimize power consumption. It must
be ensured, however, that VDD is not reduced before the power down mode is invoked, and that VDD
is restored to its normal operating level, before the power down mode is terminated. Table 12 gives
a general overview of the entry and exit procedures of the power saving modes.
Semiconductor Group
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