TLE42694_14 Datasheet, PDF (6/33 Pages) Infineon Technologies AG – Low Dropout Fixed Voltage Regulator

3.3
Pin Assignment PG-DSO-14
TLE42694
Pin Configuration
PG-DSO-14
RADJ 1
D2
GND 3
GND 4
GND 5
GND 6
RO 7
14 SI
13 Ι
12 GND
11 GND
10 GND
9Q
8 SO
AEP02248
Figure 3 Pin Configuration (top view)
3.4
Pin Definitions and Functions PG-DSO-14
Table 2 Pin Definitions and Functions PG-DSO-14
Pin
Symbol
Function
1
RADJ
Reset Threshold Adjust
connect an external voltage divider to adjust reset threshold;
connect to GND for using internal threshold
2
D
Reset Delay Timing
connect a ceramic capacitor to GND for adjusting the reset delay time;
leave open if the reset function is not needed
3, 4, 5, 6 GND
Ground
all pins must be connected to GND
7
RO
Reset Output
open collector output; internally linked to the output via a 20kΩ pull-up resistor;
leave open if the reset function is not needed
8
SO
Sense Output
open collector output; internally linked to the output via a 20kΩ pull-up resistor;
leave open if the sense comparator is not needed
9
Q
10, 11, 12 GND
Output
block to GND with a capacitor close to the IC terminals, respecting the values given
for its capacitance C_Q and ESR in the table “Functional Range” on Page 10
Ground
all pins must be connected to GND
13
I
Input
for compensating line influences, a capacitor to GND close to the IC terminals is
recommended
14
SI
Sense Input
connect the voltage to be monitored;
connect to Q if the sense comparator is not needed
Data Sheet
6
Rev. 1.3, 2014-07-03