TLE42694_14 Datasheet, PDF (5/33 Pages) Infineon Technologies AG – Low Dropout Fixed Voltage Regulator

3
Pin Configuration
3.1
Pin Assignment PG-DSO-8
TLE42694
Pin Configuration
PG-DSO-8
Ι1
SΙ 2
RADJ 3
D4
8Q
7 SO
6 RO
5 GND
AEP01668
Figure 2 Pin Configuration (top view)
3.2
Pin Definitions and Functions PG-DSO-8
Table 1 Pin Definitions and Functions PG-DSO-8
Pin Symbol
Function
1
I
Input
for compensating line influences, a capacitor to GND close to the IC terminals is
recommended
2
SI
Sense Input
connect the voltage to be monitored;
connect to Q if the sense comparator is not needed
3
RADJ
Reset Threshold Adjust
connect an external voltage divider to adjust reset threshold;
connect to GND for using internal threshold
4
D
Reset Delay Timing
connect a ceramic capacitor to GND for adjusting the reset delay time;
leave open if the reset function is not needed
5
GND
Ground
6
RO
Reset Output
open collector output; internally linked to the output via a 20kΩ pull-up resistor;
leave open if the reset function is not needed
7
SO
Sense Output
open collector output; internally linked to the output via a 20kΩ pull-up resistor;
leave open if the sense comparator is not needed
8
Q
Output
block to GND with a capacitor close to the IC terminals, respecting the values given
for its capacitance C_Q and ESR in “Functional Range” on Page 10
Data Sheet
5
Rev. 1.3, 2014-07-03