XC164SM_07 Datasheet, PDF (58/67 Pages) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller with C166SV2 Core

XC164SM
Derivatives
Electrical Parameters
4.4
AC Parameters
These parameters describe the dynamic behavior of the XC164SM.
4.4.1 Definition of Internal Timing
The internal operation of the XC164SM is controlled by the internal master clock f_MC.
The master clock signal f_MC can be generated from the oscillator clock signal f_OSC via
different mechanisms. The duration of master clock periods (TCMs) and their variation
(and also the derived external timing) depend on the used mechanism to generate f_MC.
This influence must be regarded when calculating the timings for the XC164SM.
Phase Locked Loop Operation (1:N)
f _OSC
f_MC
Direct Clock Drive (1:1)
f _OSC
f_MC
Prescaler Operation (N:1)
f _OSC
f_MC
TCM
TCM
TCM
MCT05555
Figure 14 Generation Mechanisms for the Master Clock
Note: The example for PLL operation shown in Figure 14 refers to a PLL factor of 1:4,
the example for prescaler operation refers to a divider factor of 2:1.
Data Sheet
56
V1.2, 2007-03