XC164SM_07 Datasheet, PDF (24/67 Pages) Infineon Technologies AG – 16-Bit Single-Chip Microcontroller with C166SV2 Core

XC164SM
Derivatives
Functional Description
Table 4
XC164SM Interrupt Nodes (cont’d)
Source of Interrupt or PEC
Service Request
Control
Register
Vector
Location¹⁾
Trap
Number
Unassigned node
–
xx’0050_H
14_H / 20_D
Unassigned node
–
xx’0054_H
15_H / 21_D
Unassigned node
–
xx’0058_H
16_H / 22_D
Unassigned node
–
xx’005C_H
17_H / 23_D
Unassigned node
–
xx’0078_H
1E_H / 30_D
Unassigned node
–
xx’007C_H
1F_H / 31_D
Unassigned node
–
xx’0080_H
20_H / 32_D
Unassigned node
–
xx’0084_H
21_H / 33_D
Unassigned node
–
xx’00FC_H
3F_H / 63_D
Unassigned node
–
xx’0100_H
40_H / 64_D
Unassigned node
–
xx’0104_H
41_H / 65_D
Unassigned node
–
xx’012C_H
4B_H / 75_D
Unassigned node
–
xx’0150_H
54_H / 84_D
Unassigned node
–
xx’0154_H
55_H / 85_D
Unassigned node
–
xx’0158_H
56_H / 86_D
Unassigned node
–
xx’015C_H
57_H / 87_D
Unassigned node
–
xx’0160_H
58_H / 88_D
Unassigned node
–
xx’0164_H
59_H / 89_D
Unassigned node
–
xx’0168_H
5A_H / 90_D
Unassigned node
–
xx’016C_H
5B_H / 91_D
Unassigned node
–
xx’0170_H
5C_H / 92_D
1) Register VECSEG defines the segment where the vector table is located to.
Bitfield VECSC in register CPUCON1 defines the distance between two adjacent vectors. This table
represents the default setting, with a distance of 4 (two words) between two vectors.
Data Sheet
22
V1.2, 2007-03