TLE4925 Datasheet, PDF (3/25 Pages) Infineon Technologies AG – Differential Hall Sensor

PRELIMINARY
Offset cancellation is achieved by advanced digital signal processing. Immediately after
power-on motion is detected (start-up mode). After a few transitions the sensor has
finished self-calibration and switches to a high-accuracy mode (running mode). In
running mode switching occurs at signal zero-crossing of the arithmetic mean of max
and min value of magnetic differential signal. ∆B is defined as difference between hall
plate 1 and hall plate 2.
V_S
clamping & reverse
voltage protection
power supply regulator
analog
supply
digital
supply
hyst
comp
main
comp
overtemperature
& short-circuit
protection
enable
Hall probes
+_{a+mplifier +}
--
-
filter
Offset
DAC
actual switching level
bias for temperature
& technology
compensation
oscillator
Tracking ADC
GND
reset
Figure 2: Block Diagram of TLE4925/TLE4925C
Q
clamping
n-channel
open
drain
interface
digital
min
max
algorithm
Circuit Description
The TLE4925/TLE4925C is comprised of a supply voltage regulator, a pair of hall
probes, spaced at 2.5mm, differential amplifier, noise-shaping filter, comparator,
advanced digital signal processor (DSP), A/D and D/A converter and an open drain
output.
Startup mode:
The differential signal is digitized in the A/D converter and fed into the dsp part of the
circuit. There a rising or falling transition is detected and the output stage is triggered
accordingly. As the signal is not offset compensated at this time, the output does not
neccessarily switch at zero-crossing of the magnetic signal. Signal peaks are also
detected in the digital circuit and their arithmetic mean value can be calculated. The
offset of this mean value is determined and fed into the offset cancellation DAC. This
procedure can be repeated with increasing accuracy. After few increments the IC is
switched into the high accuracy running mode.
Page 3 of 25